xref: /linux/Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml (revision e7b8153e2a4f0c9c8d1450aa7328d54ea64fe8b2)
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright 2021 Linaro Ltd.
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Intel IXP4xx V.35 WAN High Speed Serial Link (HSS)
9
10maintainers:
11  - Linus Walleij <linus.walleij@linaro.org>
12
13description: |
14  The Intel IXP4xx HSS makes use of the IXP4xx NPE (Network
15  Processing Engine) and the IXP4xx Queue Manager to process
16  V.35 Wideband Modem (WAN) links.
17
18properties:
19  compatible:
20    const: intel,ixp4xx-hss
21
22  reg:
23    maxItems: 1
24    description: The HSS instance
25
26  intel,npe-handle:
27    $ref: '/schemas/types.yaml#/definitions/phandle-array'
28    maxItems: 1
29    description: phandle to the NPE this HSS instance is using
30      and the instance to use in the second cell
31
32  intel,queue-chl-rxtrig:
33    $ref: '/schemas/types.yaml#/definitions/phandle-array'
34    maxItems: 1
35    description: phandle to the RX trigger queue on the NPE
36
37  intel,queue-chl-txready:
38    $ref: '/schemas/types.yaml#/definitions/phandle-array'
39    maxItems: 1
40    description: phandle to the TX ready queue on the NPE
41
42  intel,queue-pkt-rx:
43    $ref: '/schemas/types.yaml#/definitions/phandle-array'
44    maxItems: 1
45    description: phandle to the packet RX queue on the NPE
46
47  intel,queue-pkt-tx:
48    $ref: '/schemas/types.yaml#/definitions/phandle-array'
49    maxItems: 4
50    description: phandle to the packet TX0, TX1, TX2 and TX3 queues on the NPE
51
52  intel,queue-pkt-rxfree:
53    $ref: '/schemas/types.yaml#/definitions/phandle-array'
54    maxItems: 4
55    description: phandle to the packet RXFREE0, RXFREE1, RXFREE2 and
56      RXFREE3 queues on the NPE
57
58  intel,queue-pkt-txdone:
59    $ref: '/schemas/types.yaml#/definitions/phandle-array'
60    maxItems: 1
61    description: phandle to the packet TXDONE queue on the NPE
62
63  cts-gpios:
64    maxItems: 1
65    description: Clear To Send (CTS) GPIO line
66
67  rts-gpios:
68    maxItems: 1
69    description: Ready To Send (RTS) GPIO line
70
71  dcd-gpios:
72    maxItems: 1
73    description: Data Carrier Detect (DCD) GPIO line
74
75  dtr-gpios:
76    maxItems: 1
77    description: Data Terminal Ready (DTR) GPIO line
78
79  clk-internal-gpios:
80    maxItems: 1
81    description: Clock internal GPIO line, driving this high will make the HSS
82      use internal clocking as opposed to external clocking
83
84required:
85  - compatible
86  - reg
87  - intel,npe-handle
88  - intel,queue-chl-rxtrig
89  - intel,queue-chl-txready
90  - intel,queue-pkt-rx
91  - intel,queue-pkt-tx
92  - intel,queue-pkt-rxfree
93  - intel,queue-pkt-txdone
94  - cts-gpios
95  - rts-gpios
96  - dcd-gpios
97  - dtr-gpios
98  - clk-internal-gpios
99
100additionalProperties: false
101