1d524dac9SGrant Likely* MDIO IO device 2d524dac9SGrant Likely 3d524dac9SGrant LikelyThe MDIO is a bus to which the PHY devices are connected. For each 4d524dac9SGrant Likelydevice that exists on this bus, a child node should be created. See 5d524dac9SGrant Likelythe definition of the PHY node in booting-without-of.txt for an example 6d524dac9SGrant Likelyof how to define a PHY. 7d524dac9SGrant Likely 8d524dac9SGrant LikelyRequired properties: 9*21481189SEsben Haabendal - reg : Offset and length of the register set for the device, and optionally 10*21481189SEsben Haabendal the offset and length of the TBIPA register (TBI PHY address 11*21481189SEsben Haabendal register). If TBIPA register is not specified, the driver will 12*21481189SEsben Haabendal attempt to infer it from the register set specified (your mileage may 13*21481189SEsben Haabendal vary). 14d524dac9SGrant Likely - compatible : Should define the compatible device type for the 15132d7bcaSShruti Kanetkar mdio. Currently supported strings/devices are: 16132d7bcaSShruti Kanetkar - "fsl,gianfar-tbi" 17132d7bcaSShruti Kanetkar - "fsl,gianfar-mdio" 18132d7bcaSShruti Kanetkar - "fsl,etsec2-tbi" 19132d7bcaSShruti Kanetkar - "fsl,etsec2-mdio" 20132d7bcaSShruti Kanetkar - "fsl,ucc-mdio" 21132d7bcaSShruti Kanetkar - "fsl,fman-mdio" 22132d7bcaSShruti Kanetkar When device_type is "mdio", the following strings are also considered: 23132d7bcaSShruti Kanetkar - "gianfar" 24132d7bcaSShruti Kanetkar - "ucc_geth_phy" 25d524dac9SGrant Likely 26d524dac9SGrant LikelyExample: 27d524dac9SGrant Likely 28d524dac9SGrant Likely mdio@24520 { 29d524dac9SGrant Likely reg = <24520 20>; 30d524dac9SGrant Likely compatible = "fsl,gianfar-mdio"; 31d524dac9SGrant Likely 32d524dac9SGrant Likely ethernet-phy@0 { 33d524dac9SGrant Likely ...... 34d524dac9SGrant Likely }; 35d524dac9SGrant Likely }; 36d524dac9SGrant Likely 37d524dac9SGrant Likely* TBI Internal MDIO bus 38d524dac9SGrant Likely 39d524dac9SGrant LikelyAs of this writing, every tsec is associated with an internal TBI PHY. 40d524dac9SGrant LikelyThis PHY is accessed through the local MDIO bus. These buses are defined 41d524dac9SGrant Likelysimilarly to the mdio buses, except they are compatible with "fsl,gianfar-tbi". 42d524dac9SGrant LikelyThe TBI PHYs underneath them are similar to normal PHYs, but the reg property 43d524dac9SGrant Likelyis considered instructive, rather than descriptive. The reg property should 44d524dac9SGrant Likelybe chosen so it doesn't interfere with other PHYs on the bus. 45d524dac9SGrant Likely 46d524dac9SGrant Likely* Gianfar-compatible ethernet nodes 47d524dac9SGrant Likely 48d524dac9SGrant LikelyProperties: 49d524dac9SGrant Likely 50d524dac9SGrant Likely - device_type : Should be "network" 51d524dac9SGrant Likely - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC" 52d524dac9SGrant Likely - compatible : Should be "gianfar" 53d524dac9SGrant Likely - reg : Offset and length of the register set for the device 54d524dac9SGrant Likely - interrupts : For FEC devices, the first interrupt is the device's 55d524dac9SGrant Likely interrupt. For TSEC and eTSEC devices, the first interrupt is 56d524dac9SGrant Likely transmit, the second is receive, and the third is error. 57e8f08ee0SSergei Shtylyov - phy-handle : See ethernet.txt file in the same directory. 58ae21888fSFlorian Fainelli - fixed-link : See fixed-link.txt in the same directory. 59e8f08ee0SSergei Shtylyov - phy-connection-type : See ethernet.txt file in the same directory. 60e8f08ee0SSergei Shtylyov This property is only really needed if the connection is of type 61e8f08ee0SSergei Shtylyov "rgmii-id", as all other connection types are detected by hardware. 62d524dac9SGrant Likely - fsl,magic-packet : If present, indicates that the hardware supports 63d524dac9SGrant Likely waking up via magic packet. 6466cebb86SClaudiu Manoil - fsl,wake-on-filer : If present, indicates that the hardware supports 6566cebb86SClaudiu Manoil waking up by Filer General Purpose Interrupt (FGPI) asserted on the 6666cebb86SClaudiu Manoil Rx int line. This is an advanced power management capability allowing 6766cebb86SClaudiu Manoil certain packet types (user) defined by filer rules to wake up the system. 68d524dac9SGrant Likely - bd-stash : If present, indicates that the hardware supports stashing 69d524dac9SGrant Likely buffer descriptors in the L2. 70d524dac9SGrant Likely - rx-stash-len : Denotes the number of bytes of a received buffer to stash 71d524dac9SGrant Likely in the L2. 72d524dac9SGrant Likely - rx-stash-idx : Denotes the index of the first byte from the received 73d524dac9SGrant Likely buffer to stash in the L2. 74d524dac9SGrant Likely 75d524dac9SGrant LikelyExample: 76d524dac9SGrant Likely ethernet@24000 { 77d524dac9SGrant Likely device_type = "network"; 78d524dac9SGrant Likely model = "TSEC"; 79d524dac9SGrant Likely compatible = "gianfar"; 80d524dac9SGrant Likely reg = <0x24000 0x1000>; 81d524dac9SGrant Likely local-mac-address = [ 00 E0 0C 00 73 00 ]; 82d524dac9SGrant Likely interrupts = <29 2 30 2 34 2>; 83d524dac9SGrant Likely interrupt-parent = <&mpic>; 84d524dac9SGrant Likely phy-handle = <&phy0> 85d524dac9SGrant Likely }; 86c78275f3SRichard Cochran 87c78275f3SRichard Cochran* Gianfar PTP clock nodes 88c78275f3SRichard Cochran 89c78275f3SRichard CochranGeneral Properties: 90c78275f3SRichard Cochran 91c78275f3SRichard Cochran - compatible Should be "fsl,etsec-ptp" 92c78275f3SRichard Cochran - reg Offset and length of the register set for the device 93c78275f3SRichard Cochran - interrupts There should be at least two interrupts. Some devices 94c78275f3SRichard Cochran have as many as four PTP related interrupts. 95c78275f3SRichard Cochran 96c78275f3SRichard CochranClock Properties: 97c78275f3SRichard Cochran 98e58f6f4fSAida Mynzhasova - fsl,cksel Timer reference clock source. 99c78275f3SRichard Cochran - fsl,tclk-period Timer reference clock period in nanoseconds. 100c78275f3SRichard Cochran - fsl,tmr-prsc Prescaler, divides the output clock. 101c78275f3SRichard Cochran - fsl,tmr-add Frequency compensation value. 102c78275f3SRichard Cochran - fsl,tmr-fiper1 Fixed interval period pulse generator. 103c78275f3SRichard Cochran - fsl,tmr-fiper2 Fixed interval period pulse generator. 104c78275f3SRichard Cochran - fsl,max-adj Maximum frequency adjustment in parts per billion. 105c78275f3SRichard Cochran 106c78275f3SRichard Cochran These properties set the operational parameters for the PTP 107c78275f3SRichard Cochran clock. You must choose these carefully for the clock to work right. 108c78275f3SRichard Cochran Here is how to figure good values: 109c78275f3SRichard Cochran 110e58f6f4fSAida Mynzhasova TimerOsc = selected reference clock MHz 111c78275f3SRichard Cochran tclk_period = desired clock period nanoseconds 112c78275f3SRichard Cochran NominalFreq = 1000 / tclk_period MHz 113c78275f3SRichard Cochran FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0) 114c78275f3SRichard Cochran tmr_add = ceil(2^32 / FreqDivRatio) 115c78275f3SRichard Cochran OutputClock = NominalFreq / tmr_prsc MHz 116c78275f3SRichard Cochran PulseWidth = 1 / OutputClock microseconds 117c78275f3SRichard Cochran FiperFreq1 = desired frequency in Hz 118c78275f3SRichard Cochran FiperDiv1 = 1000000 * OutputClock / FiperFreq1 119c78275f3SRichard Cochran tmr_fiper1 = tmr_prsc * tclk_period * FiperDiv1 - tclk_period 120c78275f3SRichard Cochran max_adj = 1000000000 * (FreqDivRatio - 1.0) - 1 121c78275f3SRichard Cochran 122c78275f3SRichard Cochran The calculation for tmr_fiper2 is the same as for tmr_fiper1. The 123c78275f3SRichard Cochran driver expects that tmr_fiper1 will be correctly set to produce a 1 124c78275f3SRichard Cochran Pulse Per Second (PPS) signal, since this will be offered to the PPS 125c78275f3SRichard Cochran subsystem to synchronize the Linux clock. 126c78275f3SRichard Cochran 127e58f6f4fSAida Mynzhasova Reference clock source is determined by the value, which is holded 128e58f6f4fSAida Mynzhasova in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the 129e58f6f4fSAida Mynzhasova value, which will be directly written in those bits, that is why, 130e58f6f4fSAida Mynzhasova according to reference manual, the next clock sources can be used: 131e58f6f4fSAida Mynzhasova 132e58f6f4fSAida Mynzhasova <0> - external high precision timer reference clock (TSEC_TMR_CLK 133e58f6f4fSAida Mynzhasova input is used for this purpose); 134e58f6f4fSAida Mynzhasova <1> - eTSEC system clock; 135e58f6f4fSAida Mynzhasova <2> - eTSEC1 transmit clock; 136e58f6f4fSAida Mynzhasova <3> - RTC clock input. 137e58f6f4fSAida Mynzhasova 138e58f6f4fSAida Mynzhasova When this attribute is not used, eTSEC system clock will serve as 139e58f6f4fSAida Mynzhasova IEEE 1588 timer reference clock. 140e58f6f4fSAida Mynzhasova 141c78275f3SRichard CochranExample: 142c78275f3SRichard Cochran 143afc3bca4SRob Herring ptp_clock@24e00 { 144c78275f3SRichard Cochran compatible = "fsl,etsec-ptp"; 145c78275f3SRichard Cochran reg = <0x24E00 0xB0>; 146c78275f3SRichard Cochran interrupts = <12 0x8 13 0x8>; 147c78275f3SRichard Cochran interrupt-parent = < &ipic >; 148e58f6f4fSAida Mynzhasova fsl,cksel = <1>; 149c78275f3SRichard Cochran fsl,tclk-period = <10>; 150c78275f3SRichard Cochran fsl,tmr-prsc = <100>; 151c78275f3SRichard Cochran fsl,tmr-add = <0x999999A4>; 152c78275f3SRichard Cochran fsl,tmr-fiper1 = <0x3B9AC9F6>; 153c78275f3SRichard Cochran fsl,tmr-fiper2 = <0x00018696>; 154c78275f3SRichard Cochran fsl,max-adj = <659999998>; 155c78275f3SRichard Cochran }; 156