xref: /linux/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml (revision be239684b18e1cdcafcf8c7face4a2f562c745ad) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Faraday Technology FTGMAC100 gigabit ethernet controller
8
9allOf:
10  - $ref: ethernet-controller.yaml#
11
12maintainers:
13  - Po-Yu Chuang <ratbert@faraday-tech.com>
14
15properties:
16  compatible:
17    oneOf:
18      - const: faraday,ftgmac100
19      - items:
20          - enum:
21              - aspeed,ast2400-mac
22              - aspeed,ast2500-mac
23              - aspeed,ast2600-mac
24          - const: faraday,ftgmac100
25
26  reg:
27    maxItems: 1
28
29  interrupts:
30    maxItems: 1
31
32  clocks:
33    minItems: 1
34    items:
35      - description: MAC IP clock
36      - description: RMII RCLK gate for AST2500/2600
37
38  clock-names:
39    minItems: 1
40    items:
41      - const: MACCLK
42      - const: RCLK
43
44  phy-mode:
45    enum:
46      - rgmii
47      - rmii
48
49  phy-handle: true
50
51  use-ncsi:
52    description:
53      Use the NC-SI stack instead of an MDIO PHY. Currently assumes
54      rmii (100bT) but kept as a separate property in case NC-SI grows support
55      for a gigabit link.
56    type: boolean
57
58  no-hw-checksum:
59    description:
60      Used to disable HW checksum support. Here for backward
61      compatibility as the driver now should have correct defaults based on
62      the SoC.
63    type: boolean
64    deprecated: true
65
66  mdio:
67    $ref: /schemas/net/mdio.yaml#
68
69required:
70  - compatible
71  - reg
72  - interrupts
73
74unevaluatedProperties: false
75
76examples:
77  - |
78    ethernet@1e660000 {
79        compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
80        reg = <0x1e660000 0x180>;
81        interrupts = <2>;
82        use-ncsi;
83    };
84
85    ethernet@1e680000 {
86        compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
87        reg = <0x1e680000 0x180>;
88        interrupts = <2>;
89
90        phy-handle = <&phy>;
91        phy-mode = "rgmii";
92
93        mdio {
94            #address-cells = <1>;
95            #size-cells = <0>;
96
97            phy: ethernet-phy@1 {
98                compatible = "ethernet-phy-ieee802.3-c22";
99                reg = <1>;
100            };
101        };
102    };
103