1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Faraday Technology FTGMAC100 gigabit ethernet controller 8 9allOf: 10 - $ref: ethernet-controller.yaml# 11 12maintainers: 13 - Po-Yu Chuang <ratbert@faraday-tech.com> 14 15properties: 16 compatible: 17 oneOf: 18 - const: faraday,ftgmac100 19 - items: 20 - enum: 21 - aspeed,ast2400-mac 22 - aspeed,ast2500-mac 23 - aspeed,ast2600-mac 24 - const: faraday,ftgmac100 25 26 reg: 27 maxItems: 1 28 29 interrupts: 30 maxItems: 1 31 32 clocks: 33 minItems: 1 34 items: 35 - description: MAC IP clock 36 - description: RMII RCLK gate for AST2500/2600 37 38 clock-names: 39 minItems: 1 40 items: 41 - const: MACCLK 42 - const: RCLK 43 44 phy-mode: 45 enum: 46 - rgmii 47 - rgmii-id 48 - rgmii-rxid 49 - rgmii-txid 50 - rmii 51 52 phy-handle: true 53 54 use-ncsi: 55 description: 56 Use the NC-SI stack instead of an MDIO PHY. Currently assumes 57 rmii (100bT) but kept as a separate property in case NC-SI grows support 58 for a gigabit link. 59 type: boolean 60 61 no-hw-checksum: 62 description: 63 Used to disable HW checksum support. Here for backward 64 compatibility as the driver now should have correct defaults based on 65 the SoC. 66 type: boolean 67 deprecated: true 68 69 mdio: 70 $ref: /schemas/net/mdio.yaml# 71 72required: 73 - compatible 74 - reg 75 - interrupts 76 77unevaluatedProperties: false 78 79examples: 80 - | 81 ethernet@1e660000 { 82 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100"; 83 reg = <0x1e660000 0x180>; 84 interrupts = <2>; 85 use-ncsi; 86 }; 87 88 ethernet@1e680000 { 89 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100"; 90 reg = <0x1e680000 0x180>; 91 interrupts = <2>; 92 93 phy-handle = <&phy>; 94 phy-mode = "rgmii"; 95 96 mdio { 97 #address-cells = <1>; 98 #size-cells = <0>; 99 100 phy: ethernet-phy@1 { 101 compatible = "ethernet-phy-ieee802.3-c22"; 102 reg = <1>; 103 }; 104 }; 105 }; 106