1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/ethernet-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Ethernet PHY Generic Binding 8 9maintainers: 10 - Andrew Lunn <andrew@lunn.ch> 11 - Florian Fainelli <f.fainelli@gmail.com> 12 - Heiner Kallweit <hkallweit1@gmail.com> 13 14# The dt-schema tools will generate a select statement first by using 15# the compatible, and second by using the node name if any. In our 16# case, the node name is the one we want to match on, while the 17# compatible is optional. 18select: 19 properties: 20 $nodename: 21 pattern: "^ethernet-phy(@[a-f0-9]+)?$" 22 23 required: 24 - $nodename 25 26properties: 27 $nodename: 28 pattern: "^ethernet-phy(@[a-f0-9]+)?$" 29 30 compatible: 31 oneOf: 32 - const: ethernet-phy-ieee802.3-c22 33 description: PHYs that implement IEEE802.3 clause 22 34 - const: ethernet-phy-ieee802.3-c45 35 description: PHYs that implement IEEE802.3 clause 45 36 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$" 37 description: 38 If the PHY reports an incorrect ID (or none at all) then the 39 compatible list may contain an entry with the correct PHY ID 40 in the above form. 41 The first group of digits is the 16 bit Phy Identifier 1 42 register, this is the chip vendor OUI bits 3:18. The 43 second group of digits is the Phy Identifier 2 register, 44 this is the chip vendor OUI bits 19:24, followed by 10 45 bits of a vendor specific ID. 46 - items: 47 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$" 48 - const: ethernet-phy-ieee802.3-c45 49 50 reg: 51 minimum: 0 52 maximum: 31 53 description: 54 The ID number for the PHY. 55 56 interrupts: 57 maxItems: 1 58 59 max-speed: 60 enum: 61 - 10 62 - 100 63 - 1000 64 - 2500 65 - 5000 66 - 10000 67 - 20000 68 - 25000 69 - 40000 70 - 50000 71 - 56000 72 - 100000 73 - 200000 74 description: 75 Maximum PHY supported speed in Mbits / seconds. 76 77 broken-turn-around: 78 $ref: /schemas/types.yaml#definitions/flag 79 description: 80 If set, indicates the PHY device does not correctly release 81 the turn around line low at the end of a MDIO transaction. 82 83 enet-phy-lane-swap: 84 $ref: /schemas/types.yaml#definitions/flag 85 description: 86 If set, indicates the PHY will swap the TX/RX lanes to 87 compensate for the board being designed with the lanes 88 swapped. 89 90 eee-broken-100tx: 91 $ref: /schemas/types.yaml#definitions/flag 92 description: 93 Mark the corresponding energy efficient ethernet mode as 94 broken and request the ethernet to stop advertising it. 95 96 eee-broken-1000t: 97 $ref: /schemas/types.yaml#definitions/flag 98 description: 99 Mark the corresponding energy efficient ethernet mode as 100 broken and request the ethernet to stop advertising it. 101 102 eee-broken-10gt: 103 $ref: /schemas/types.yaml#definitions/flag 104 description: 105 Mark the corresponding energy efficient ethernet mode as 106 broken and request the ethernet to stop advertising it. 107 108 eee-broken-1000kx: 109 $ref: /schemas/types.yaml#definitions/flag 110 description: 111 Mark the corresponding energy efficient ethernet mode as 112 broken and request the ethernet to stop advertising it. 113 114 eee-broken-10gkx4: 115 $ref: /schemas/types.yaml#definitions/flag 116 description: 117 Mark the corresponding energy efficient ethernet mode as 118 broken and request the ethernet to stop advertising it. 119 120 eee-broken-10gkr: 121 $ref: /schemas/types.yaml#definitions/flag 122 description: 123 Mark the corresponding energy efficient ethernet mode as 124 broken and request the ethernet to stop advertising it. 125 126 phy-is-integrated: 127 $ref: /schemas/types.yaml#definitions/flag 128 description: 129 If set, indicates that the PHY is integrated into the same 130 physical package as the Ethernet MAC. If needed, muxers 131 should be configured to ensure the integrated PHY is 132 used. The absence of this property indicates the muxers 133 should be configured so that the external PHY is used. 134 135 resets: 136 maxItems: 1 137 138 reset-names: 139 const: phy 140 141 reset-gpios: 142 maxItems: 1 143 description: 144 The GPIO phandle and specifier for the PHY reset signal. 145 146 reset-assert-us: 147 description: 148 Delay after the reset was asserted in microseconds. If this 149 property is missing the delay will be skipped. 150 151 reset-deassert-us: 152 description: 153 Delay after the reset was deasserted in microseconds. If 154 this property is missing the delay will be skipped. 155 156required: 157 - reg 158 159examples: 160 - | 161 ethernet { 162 #address-cells = <1>; 163 #size-cells = <0>; 164 165 ethernet-phy@0 { 166 compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c45"; 167 interrupt-parent = <&PIC>; 168 interrupts = <35 1>; 169 reg = <0>; 170 171 resets = <&rst 8>; 172 reset-names = "phy"; 173 reset-gpios = <&gpio1 4 1>; 174 reset-assert-us = <1000>; 175 reset-deassert-us = <2000>; 176 }; 177 }; 178