1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/ethernet-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Ethernet PHY Generic Binding 8 9maintainers: 10 - Andrew Lunn <andrew@lunn.ch> 11 - Florian Fainelli <f.fainelli@gmail.com> 12 - Heiner Kallweit <hkallweit1@gmail.com> 13 14# The dt-schema tools will generate a select statement first by using 15# the compatible, and second by using the node name if any. In our 16# case, the node name is the one we want to match on, while the 17# compatible is optional. 18select: 19 properties: 20 $nodename: 21 pattern: "^ethernet-phy(@[a-f0-9]+)?$" 22 23 required: 24 - $nodename 25 26properties: 27 $nodename: 28 pattern: "^ethernet-phy(@[a-f0-9]+)?$" 29 30 compatible: 31 oneOf: 32 - const: ethernet-phy-ieee802.3-c22 33 description: PHYs that implement IEEE802.3 clause 22 34 - const: ethernet-phy-ieee802.3-c45 35 description: PHYs that implement IEEE802.3 clause 45 36 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$" 37 description: 38 If the PHY reports an incorrect ID (or none at all) then the 39 compatible list may contain an entry with the correct PHY ID 40 in the above form. 41 The first group of digits is the 16 bit Phy Identifier 1 42 register, this is the chip vendor OUI bits 3:18. The 43 second group of digits is the Phy Identifier 2 register, 44 this is the chip vendor OUI bits 19:24, followed by 10 45 bits of a vendor specific ID. 46 - items: 47 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$" 48 - const: ethernet-phy-ieee802.3-c22 49 - items: 50 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$" 51 - const: ethernet-phy-ieee802.3-c45 52 53 reg: 54 minimum: 0 55 maximum: 31 56 description: 57 The ID number for the PHY. 58 59 interrupts: 60 maxItems: 1 61 62 max-speed: 63 enum: 64 - 10 65 - 100 66 - 1000 67 - 2500 68 - 5000 69 - 10000 70 - 20000 71 - 25000 72 - 40000 73 - 50000 74 - 56000 75 - 100000 76 - 200000 77 description: 78 Maximum PHY supported speed in Mbits / seconds. 79 80 broken-turn-around: 81 $ref: /schemas/types.yaml#definitions/flag 82 description: 83 If set, indicates the PHY device does not correctly release 84 the turn around line low at the end of a MDIO transaction. 85 86 enet-phy-lane-swap: 87 $ref: /schemas/types.yaml#definitions/flag 88 description: 89 If set, indicates the PHY will swap the TX/RX lanes to 90 compensate for the board being designed with the lanes 91 swapped. 92 93 eee-broken-100tx: 94 $ref: /schemas/types.yaml#definitions/flag 95 description: 96 Mark the corresponding energy efficient ethernet mode as 97 broken and request the ethernet to stop advertising it. 98 99 eee-broken-1000t: 100 $ref: /schemas/types.yaml#definitions/flag 101 description: 102 Mark the corresponding energy efficient ethernet mode as 103 broken and request the ethernet to stop advertising it. 104 105 eee-broken-10gt: 106 $ref: /schemas/types.yaml#definitions/flag 107 description: 108 Mark the corresponding energy efficient ethernet mode as 109 broken and request the ethernet to stop advertising it. 110 111 eee-broken-1000kx: 112 $ref: /schemas/types.yaml#definitions/flag 113 description: 114 Mark the corresponding energy efficient ethernet mode as 115 broken and request the ethernet to stop advertising it. 116 117 eee-broken-10gkx4: 118 $ref: /schemas/types.yaml#definitions/flag 119 description: 120 Mark the corresponding energy efficient ethernet mode as 121 broken and request the ethernet to stop advertising it. 122 123 eee-broken-10gkr: 124 $ref: /schemas/types.yaml#definitions/flag 125 description: 126 Mark the corresponding energy efficient ethernet mode as 127 broken and request the ethernet to stop advertising it. 128 129 phy-is-integrated: 130 $ref: /schemas/types.yaml#definitions/flag 131 description: 132 If set, indicates that the PHY is integrated into the same 133 physical package as the Ethernet MAC. If needed, muxers 134 should be configured to ensure the integrated PHY is 135 used. The absence of this property indicates the muxers 136 should be configured so that the external PHY is used. 137 138 resets: 139 maxItems: 1 140 141 reset-names: 142 const: phy 143 144 reset-gpios: 145 maxItems: 1 146 description: 147 The GPIO phandle and specifier for the PHY reset signal. 148 149 reset-assert-us: 150 description: 151 Delay after the reset was asserted in microseconds. If this 152 property is missing the delay will be skipped. 153 154 reset-deassert-us: 155 description: 156 Delay after the reset was deasserted in microseconds. If 157 this property is missing the delay will be skipped. 158 159 sfp: 160 $ref: /schemas/types.yaml#definitions/phandle 161 description: 162 Specifies a reference to a node representing a SFP cage. 163 164required: 165 - reg 166 167examples: 168 - | 169 ethernet { 170 #address-cells = <1>; 171 #size-cells = <0>; 172 173 ethernet-phy@0 { 174 compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c45"; 175 interrupt-parent = <&PIC>; 176 interrupts = <35 1>; 177 reg = <0>; 178 179 resets = <&rst 8>; 180 reset-names = "phy"; 181 reset-gpios = <&gpio1 4 1>; 182 reset-assert-us = <1000>; 183 reset-deassert-us = <2000>; 184 }; 185 }; 186