1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/ethernet-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Ethernet PHY Common Properties 8 9maintainers: 10 - Andrew Lunn <andrew@lunn.ch> 11 - Florian Fainelli <f.fainelli@gmail.com> 12 - Heiner Kallweit <hkallweit1@gmail.com> 13 14# The dt-schema tools will generate a select statement first by using 15# the compatible, and second by using the node name if any. In our 16# case, the node name is the one we want to match on, while the 17# compatible is optional. 18select: 19 properties: 20 $nodename: 21 pattern: "^ethernet-phy(@[a-f0-9]+)?$" 22 23 required: 24 - $nodename 25 26properties: 27 $nodename: 28 pattern: "^ethernet-phy(@[a-f0-9]+)?$" 29 30 compatible: 31 oneOf: 32 - const: ethernet-phy-ieee802.3-c22 33 description: PHYs that implement IEEE802.3 clause 22 34 - const: ethernet-phy-ieee802.3-c45 35 description: PHYs that implement IEEE802.3 clause 45 36 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$" 37 description: 38 If the PHY reports an incorrect ID (or none at all) then the 39 compatible list may contain an entry with the correct PHY ID 40 in the above form. 41 The first group of digits is the 16 bit Phy Identifier 1 42 register, this is the chip vendor OUI bits 3:18. The 43 second group of digits is the Phy Identifier 2 register, 44 this is the chip vendor OUI bits 19:24, followed by 10 45 bits of a vendor specific ID. 46 - items: 47 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$" 48 - const: ethernet-phy-ieee802.3-c22 49 - items: 50 - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$" 51 - const: ethernet-phy-ieee802.3-c45 52 53 reg: 54 minimum: 0 55 maximum: 31 56 description: 57 The ID number for the PHY. 58 59 interrupts: 60 maxItems: 1 61 62 max-speed: 63 enum: 64 - 10 65 - 100 66 - 1000 67 - 2500 68 - 5000 69 - 10000 70 - 20000 71 - 25000 72 - 40000 73 - 50000 74 - 56000 75 - 100000 76 - 200000 77 description: 78 Maximum PHY supported speed in Mbits / seconds. 79 80 phy-10base-t1l-2.4vpp: 81 description: | 82 tristate, request/disable 2.4 Vpp operating mode. The values are: 83 0: Disable 2.4 Vpp operating mode. 84 1: Request 2.4 Vpp operating mode from link partner. 85 Absence of this property will leave configuration to default values. 86 $ref: /schemas/types.yaml#/definitions/uint32 87 enum: [0, 1] 88 89 broken-turn-around: 90 $ref: /schemas/types.yaml#/definitions/flag 91 description: 92 If set, indicates the PHY device does not correctly release 93 the turn around line low at end of the control phase of the 94 MDIO transaction. 95 96 clocks: 97 maxItems: 1 98 description: 99 External clock connected to the PHY. If not specified it is assumed 100 that the PHY uses a fixed crystal or an internal oscillator. 101 102 enet-phy-lane-swap: 103 $ref: /schemas/types.yaml#/definitions/flag 104 description: 105 If set, indicates the PHY will swap the TX/RX lanes to 106 compensate for the board being designed with the lanes 107 swapped. 108 109 enet-phy-lane-no-swap: 110 $ref: /schemas/types.yaml#/definitions/flag 111 description: 112 If set, indicates that PHY will disable swap of the 113 TX/RX lanes. This property allows the PHY to work correcly after 114 e.g. wrong bootstrap configuration caused by issues in PCB 115 layout design. 116 117 eee-broken-100tx: 118 $ref: /schemas/types.yaml#/definitions/flag 119 description: 120 Mark the corresponding energy efficient ethernet mode as 121 broken and request the ethernet to stop advertising it. 122 123 eee-broken-1000t: 124 $ref: /schemas/types.yaml#/definitions/flag 125 description: 126 Mark the corresponding energy efficient ethernet mode as 127 broken and request the ethernet to stop advertising it. 128 129 eee-broken-10gt: 130 $ref: /schemas/types.yaml#/definitions/flag 131 description: 132 Mark the corresponding energy efficient ethernet mode as 133 broken and request the ethernet to stop advertising it. 134 135 eee-broken-1000kx: 136 $ref: /schemas/types.yaml#/definitions/flag 137 description: 138 Mark the corresponding energy efficient ethernet mode as 139 broken and request the ethernet to stop advertising it. 140 141 eee-broken-10gkx4: 142 $ref: /schemas/types.yaml#/definitions/flag 143 description: 144 Mark the corresponding energy efficient ethernet mode as 145 broken and request the ethernet to stop advertising it. 146 147 eee-broken-10gkr: 148 $ref: /schemas/types.yaml#/definitions/flag 149 description: 150 Mark the corresponding energy efficient ethernet mode as 151 broken and request the ethernet to stop advertising it. 152 153 pses: 154 $ref: /schemas/types.yaml#/definitions/phandle-array 155 maxItems: 1 156 description: 157 Specifies a reference to a node representing a Power Sourcing Equipment. 158 159 phy-is-integrated: 160 $ref: /schemas/types.yaml#/definitions/flag 161 description: 162 If set, indicates that the PHY is integrated into the same 163 physical package as the Ethernet MAC. If needed, muxers 164 should be configured to ensure the integrated PHY is 165 used. The absence of this property indicates the muxers 166 should be configured so that the external PHY is used. 167 168 resets: 169 maxItems: 1 170 171 reset-names: 172 const: phy 173 174 reset-gpios: 175 maxItems: 1 176 description: 177 The GPIO phandle and specifier for the PHY reset signal. 178 179 reset-assert-us: 180 description: 181 Delay after the reset was asserted in microseconds. If this 182 property is missing the delay will be skipped. 183 184 reset-deassert-us: 185 description: 186 Delay after the reset was deasserted in microseconds. If 187 this property is missing the delay will be skipped. 188 189 sfp: 190 $ref: /schemas/types.yaml#/definitions/phandle 191 description: 192 Specifies a reference to a node representing a SFP cage. 193 194 rx-internal-delay-ps: 195 description: | 196 RGMII Receive PHY Clock Delay defined in pico seconds. This is used for 197 PHY's that have configurable RX internal delays. If this property is 198 present then the PHY applies the RX delay. 199 200 tx-internal-delay-ps: 201 description: | 202 RGMII Transmit PHY Clock Delay defined in pico seconds. This is used for 203 PHY's that have configurable TX internal delays. If this property is 204 present then the PHY applies the TX delay. 205 206 leds: 207 type: object 208 209 properties: 210 '#address-cells': 211 const: 1 212 213 '#size-cells': 214 const: 0 215 216 patternProperties: 217 '^led@[a-f0-9]+$': 218 $ref: /schemas/leds/common.yaml# 219 220 properties: 221 reg: 222 maxItems: 1 223 description: 224 This define the LED index in the PHY or the MAC. It's really 225 driver dependent and required for ports that define multiple 226 LED for the same port. 227 228 required: 229 - reg 230 231 unevaluatedProperties: false 232 233 additionalProperties: false 234 235required: 236 - reg 237 238additionalProperties: true 239 240examples: 241 - | 242 #include <dt-bindings/leds/common.h> 243 244 ethernet { 245 #address-cells = <1>; 246 #size-cells = <0>; 247 248 ethernet-phy@0 { 249 compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c45"; 250 interrupt-parent = <&PIC>; 251 interrupts = <35 1>; 252 reg = <0>; 253 254 resets = <&rst 8>; 255 reset-names = "phy"; 256 reset-gpios = <&gpio1 4 1>; 257 reset-assert-us = <1000>; 258 reset-deassert-us = <2000>; 259 260 leds { 261 #address-cells = <1>; 262 #size-cells = <0>; 263 264 led@0 { 265 reg = <0>; 266 color = <LED_COLOR_ID_WHITE>; 267 function = LED_FUNCTION_LAN; 268 default-state = "keep"; 269 }; 270 }; 271 }; 272 }; 273