1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/ethernet-controller.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Ethernet Controller Common Properties 8 9maintainers: 10 - David S. Miller <davem@davemloft.net> 11 12properties: 13 $nodename: 14 pattern: "^ethernet(@.*)?$" 15 16 label: 17 description: Human readable label on a port of a box. 18 19 max-speed: 20 $ref: /schemas/types.yaml#/definitions/uint32 21 description: 22 Specifies maximum speed in Mbit/s supported by the device. 23 24 nvmem-cells: 25 maxItems: 1 26 description: 27 Reference to an nvmem node for the MAC address 28 29 nvmem-cell-names: 30 const: mac-address 31 32 phy-connection-type: 33 description: 34 Specifies interface type between the Ethernet device and a physical 35 layer (PHY) device. 36 enum: 37 # There is not a standard bus between the MAC and the PHY, 38 # something proprietary is being used to embed the PHY in the 39 # MAC. 40 - internal 41 - mii 42 - gmii 43 - sgmii 44 - psgmii 45 - qsgmii 46 - qusgmii 47 - tbi 48 - rev-mii 49 - rmii 50 - rev-rmii 51 - moca 52 53 # RX and TX delays are added by the MAC when required 54 - rgmii 55 56 # RGMII with internal RX and TX delays provided by the PHY, 57 # the MAC should not add the RX or TX delays in this case 58 - rgmii-id 59 60 # RGMII with internal RX delay provided by the PHY, the MAC 61 # should not add an RX delay in this case 62 - rgmii-rxid 63 64 # RGMII with internal TX delay provided by the PHY, the MAC 65 # should not add an TX delay in this case 66 - rgmii-txid 67 - rtbi 68 - smii 69 - xgmii 70 - trgmii 71 - 1000base-x 72 - 2500base-x 73 - 5gbase-r 74 - rxaui 75 - xaui 76 77 # 10GBASE-KR, XFI, SFI 78 - 10gbase-kr 79 - usxgmii 80 - 10gbase-r 81 - 25gbase-r 82 - 10g-qxgmii 83 84 phy-mode: 85 $ref: "#/properties/phy-connection-type" 86 87 pcs-handle: 88 $ref: /schemas/types.yaml#/definitions/phandle-array 89 items: 90 maxItems: 1 91 description: 92 Specifies a reference to a node representing a PCS PHY device on a MDIO 93 bus to link with an external PHY (phy-handle) if exists. 94 95 pcs-handle-names: 96 description: 97 The name of each PCS in pcs-handle. 98 99 phy-handle: 100 $ref: /schemas/types.yaml#/definitions/phandle 101 description: 102 Specifies a reference to a node representing a PHY device. 103 104 phy: 105 $ref: "#/properties/phy-handle" 106 deprecated: true 107 108 phy-device: 109 $ref: "#/properties/phy-handle" 110 deprecated: true 111 112 rx-fifo-depth: 113 $ref: /schemas/types.yaml#/definitions/uint32 114 description: 115 The size of the controller\'s receive fifo in bytes. This is used 116 for components that can have configurable receive fifo sizes, 117 and is useful for determining certain configuration settings 118 such as flow control thresholds. 119 120 sfp: 121 $ref: /schemas/types.yaml#/definitions/phandle 122 description: 123 Specifies a reference to a node representing a SFP cage. 124 125 tx-fifo-depth: 126 $ref: /schemas/types.yaml#/definitions/uint32 127 description: 128 The size of the controller\'s transmit fifo in bytes. This 129 is used for components that can have configurable fifo sizes. 130 131 managed: 132 description: 133 Specifies the PHY management type. If auto is set and fixed-link 134 is not specified, it uses MDIO for management. 135 $ref: /schemas/types.yaml#/definitions/string 136 default: auto 137 enum: 138 - auto 139 - in-band-status 140 141 fixed-link: 142 oneOf: 143 - $ref: /schemas/types.yaml#/definitions/uint32-array 144 deprecated: true 145 items: 146 - minimum: 0 147 maximum: 31 148 description: 149 Emulated PHY ID, choose any but unique to the all 150 specified fixed-links 151 152 - enum: [0, 1] 153 description: 154 Duplex configuration. 0 for half duplex or 1 for 155 full duplex 156 157 - enum: [10, 100, 1000, 2500, 10000] 158 description: 159 Link speed in Mbits/sec. 160 161 - enum: [0, 1] 162 description: 163 Pause configuration. 0 for no pause, 1 for pause 164 165 - enum: [0, 1] 166 description: 167 Asymmetric pause configuration. 0 for no asymmetric 168 pause, 1 for asymmetric pause 169 - type: object 170 additionalProperties: false 171 properties: 172 speed: 173 description: 174 Link speed. 175 $ref: /schemas/types.yaml#/definitions/uint32 176 enum: [10, 100, 1000, 2500, 10000] 177 178 full-duplex: 179 $ref: /schemas/types.yaml#/definitions/flag 180 description: 181 Indicates that full-duplex is used. When absent, half 182 duplex is assumed. 183 184 pause: 185 $ref: /schemas/types.yaml#/definitions/flag 186 description: 187 Indicates that pause should be enabled. 188 189 asym-pause: 190 $ref: /schemas/types.yaml#/definitions/flag 191 description: 192 Indicates that asym_pause should be enabled. 193 194 link-gpios: 195 maxItems: 1 196 description: 197 GPIO to determine if the link is up 198 199 required: 200 - speed 201 202 leds: 203 description: 204 Describes the LEDs associated by Ethernet Controller. 205 These LEDs are not integrated in the PHY and PHY doesn't have any 206 control on them. Ethernet Controller regs are used to control 207 these defined LEDs. 208 209 type: object 210 211 properties: 212 '#address-cells': 213 const: 1 214 215 '#size-cells': 216 const: 0 217 218 patternProperties: 219 '^led@[a-f0-9]+$': 220 $ref: /schemas/leds/common.yaml# 221 222 properties: 223 reg: 224 maxItems: 1 225 description: 226 This define the LED index in the PHY or the MAC. It's really 227 driver dependent and required for ports that define multiple 228 LED for the same port. 229 230 required: 231 - reg 232 233 unevaluatedProperties: false 234 235 additionalProperties: false 236 237dependencies: 238 pcs-handle-names: [pcs-handle] 239 240allOf: 241 - $ref: /schemas/net/network-class.yaml# 242 - if: 243 properties: 244 phy-mode: 245 contains: 246 enum: 247 - rgmii 248 - rgmii-rxid 249 - rgmii-txid 250 - rgmii-id 251 then: 252 properties: 253 rx-internal-delay-ps: 254 description: 255 RGMII Receive Clock Delay defined in pico seconds. This is used for 256 controllers that have configurable RX internal delays. If this 257 property is present then the MAC applies the RX delay. 258 tx-internal-delay-ps: 259 description: 260 RGMII Transmit Clock Delay defined in pico seconds. This is used for 261 controllers that have configurable TX internal delays. If this 262 property is present then the MAC applies the TX delay. 263 264additionalProperties: true 265 266... 267