xref: /linux/Documentation/devicetree/bindings/net/dsa/realtek.yaml (revision 47dbcfdf942a35dbf842ea05bb2248fcda411da7) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/dsa/realtek.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Realtek switches for unmanaged switches
8
9allOf:
10  - $ref: dsa.yaml#/$defs/ethernet-ports
11  - if:
12      not:
13        properties:
14          compatible:
15            contains:
16              const: realtek,rtl8365mb
17    then:
18      properties:
19        avddh-supply: false
20        avddl-supply: false
21        dvddio-supply: false
22        dvddio1-supply: false
23        dvddl-supply: false
24        pllvddl-supply: false
25
26maintainers:
27  - Linus Walleij <linusw@kernel.org>
28
29description:
30  Realtek advertises these chips as fast/gigabit switches or unmanaged
31  switches. They can be controlled using different interfaces, like SMI,
32  MDIO or SPI.
33
34  The SMI "Simple Management Interface" is a two-wire protocol using
35  bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
36  not use the MDIO protocol. This binding defines how to specify the
37  SMI-based Realtek devices. The realtek-smi driver is a platform driver
38  and it must be inserted inside a platform node.
39
40  The MDIO-connected switches use MDIO protocol to access their registers.
41  The realtek-mdio driver is an MDIO driver and it must be inserted inside
42  an MDIO node.
43
44  The compatible string is only used to identify which (silicon) family the
45  switch belongs to. Roughly speaking, a family is any set of Realtek switches
46  whose chip identification register(s) have a common location and semantics.
47  The different models in a given family can be automatically disambiguated by
48  parsing the chip identification register(s) according to the given family,
49  avoiding the need for a unique compatible string for each model.
50
51properties:
52  compatible:
53    enum:
54      - realtek,rtl8365mb
55      - realtek,rtl8366rb
56    description: |
57      realtek,rtl8365mb:
58        Use with models RTL8363NB, RTL8363NB-VB, RTL8363SC, RTL8363SC-VB,
59        RTL8364NB, RTL8364NB-VB, RTL8365MB, RTL8366SC, RTL8367RB-VB, RTL8367S,
60        RTL8367SB, RTL8370MB, RTL8310SR
61      realtek,rtl8366rb:
62        Use with models RTL8366RB, RTL8366S
63
64  mdc-gpios:
65    description: GPIO line for the MDC clock line.
66    maxItems: 1
67
68  mdio-gpios:
69    description: GPIO line for the MDIO data line.
70    maxItems: 1
71
72  reset-gpios:
73    description: GPIO to be used to reset the whole device
74    maxItems: 1
75
76  resets:
77    maxItems: 1
78
79  avddh-supply:
80    description: AVDDH high-voltage analog supply.
81
82  avddl-supply:
83    description: AVDDL low-voltage analog supply.
84
85  dvddio-supply:
86    description: DVDDIO digital I/O supply.
87
88  dvddio1-supply:
89    description: DVDDIO_1 secondary digital I/O supply for the RGMII bank.
90
91  dvddl-supply:
92    description: DVDDL digital core supply.
93
94  pllvddl-supply:
95    description: PLLVDDL PLL analog supply.
96
97  realtek,disable-leds:
98    type: boolean
99    description: |
100      if the LED drivers are not used in the hardware design,
101      this will disable them so they are not turned on
102      and wasting power.
103
104  interrupt-controller:
105    type: object
106    additionalProperties: false
107
108    description: |
109      This defines an interrupt controller with an IRQ line (typically
110      a GPIO) that will demultiplex and handle the interrupt from the single
111      interrupt line coming out of one of the Realtek switch chips. It most
112      importantly provides link up/down interrupts to the PHY blocks inside
113      the ASIC.
114
115    properties:
116
117      interrupt-controller: true
118
119      interrupts:
120        maxItems: 1
121        description:
122          A single IRQ line from the switch, either active LOW or HIGH
123
124      '#address-cells':
125        const: 0
126
127      '#interrupt-cells':
128        const: 1
129
130    required:
131      - interrupt-controller
132      - '#address-cells'
133      - '#interrupt-cells'
134
135  mdio:
136    $ref: /schemas/net/mdio.yaml#
137    unevaluatedProperties: false
138
139    properties:
140      compatible:
141        const: realtek,smi-mdio
142
143if:
144  required:
145    - reg
146
147then:
148  $ref: /schemas/spi/spi-peripheral-props.yaml#
149  not:
150    required:
151      - mdc-gpios
152      - mdio-gpios
153      - mdio
154
155  properties:
156    mdc-gpios: false
157    mdio-gpios: false
158    mdio: false
159
160else:
161  required:
162    - mdc-gpios
163    - mdio-gpios
164    - mdio
165
166required:
167  - compatible
168
169    #  - mdc-gpios
170    #  - mdio-gpios
171    #  - reset-gpios
172    #  - mdio
173
174unevaluatedProperties: false
175
176examples:
177  - |
178    #include <dt-bindings/gpio/gpio.h>
179    #include <dt-bindings/interrupt-controller/irq.h>
180
181    platform {
182            ethernet-switch {
183                    compatible = "realtek,rtl8366rb";
184                    /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
185                    mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
186                    mdio-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
187                    reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
188
189                    switch_intc1: interrupt-controller {
190                            /* GPIO 15 provides the interrupt */
191                            interrupt-parent = <&gpio0>;
192                            interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
193                            interrupt-controller;
194                            #address-cells = <0>;
195                            #interrupt-cells = <1>;
196                    };
197
198                    ethernet-ports {
199                            #address-cells = <1>;
200                            #size-cells = <0>;
201                            ethernet-port@0 {
202                                    reg = <0>;
203                                    label = "lan0";
204                                    phy-handle = <&phy0>;
205                            };
206                            ethernet-port@1 {
207                                    reg = <1>;
208                                    label = "lan1";
209                                    phy-handle = <&phy1>;
210                            };
211                            ethernet-port@2 {
212                                    reg = <2>;
213                                    label = "lan2";
214                                    phy-handle = <&phy2>;
215                            };
216                            ethernet-port@3 {
217                                    reg = <3>;
218                                    label = "lan3";
219                                    phy-handle = <&phy3>;
220                            };
221                            ethernet-port@4 {
222                                    reg = <4>;
223                                    label = "wan";
224                                    phy-handle = <&phy4>;
225                            };
226                            ethernet-port@5 {
227                                    reg = <5>;
228                                    ethernet = <&gmac0>;
229                                    phy-mode = "rgmii";
230                                    fixed-link {
231                                            speed = <1000>;
232                                            full-duplex;
233                                    };
234                            };
235                    };
236
237                    mdio {
238                            compatible = "realtek,smi-mdio";
239                            #address-cells = <1>;
240                            #size-cells = <0>;
241
242                            phy0: ethernet-phy@0 {
243                                    reg = <0>;
244                                    interrupt-parent = <&switch_intc1>;
245                                    interrupts = <0>;
246                            };
247                            phy1: ethernet-phy@1 {
248                                    reg = <1>;
249                                    interrupt-parent = <&switch_intc1>;
250                                    interrupts = <1>;
251                            };
252                            phy2: ethernet-phy@2 {
253                                    reg = <2>;
254                                    interrupt-parent = <&switch_intc1>;
255                                    interrupts = <2>;
256                            };
257                            phy3: ethernet-phy@3 {
258                                    reg = <3>;
259                                    interrupt-parent = <&switch_intc1>;
260                                    interrupts = <3>;
261                            };
262                            phy4: ethernet-phy@4 {
263                                    reg = <4>;
264                                    interrupt-parent = <&switch_intc1>;
265                                    interrupts = <12>;
266                            };
267                    };
268            };
269    };
270
271  - |
272    #include <dt-bindings/gpio/gpio.h>
273    #include <dt-bindings/interrupt-controller/irq.h>
274
275    platform {
276            ethernet-switch {
277                    compatible = "realtek,rtl8365mb";
278                    avddh-supply = <&avddh>;
279                    mdc-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
280                    mdio-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
281                    reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
282
283                    switch_intc2: interrupt-controller {
284                            interrupt-parent = <&gpio5>;
285                            interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
286                            interrupt-controller;
287                            #address-cells = <0>;
288                            #interrupt-cells = <1>;
289                    };
290
291                    ethernet-ports {
292                            #address-cells = <1>;
293                            #size-cells = <0>;
294                            ethernet-port@0 {
295                                    reg = <0>;
296                                    label = "swp0";
297                                    phy-handle = <&ethphy0>;
298                            };
299                            ethernet-port@1 {
300                                    reg = <1>;
301                                    label = "swp1";
302                                    phy-handle = <&ethphy1>;
303                            };
304                            ethernet-port@2 {
305                                    reg = <2>;
306                                    label = "swp2";
307                                    phy-handle = <&ethphy2>;
308                            };
309                            ethernet-port@3 {
310                                    reg = <3>;
311                                    label = "swp3";
312                                    phy-handle = <&ethphy3>;
313                            };
314                            ethernet-port@6 {
315                                    reg = <6>;
316                                    ethernet = <&fec1>;
317                                    phy-mode = "rgmii";
318                                    tx-internal-delay-ps = <2000>;
319                                    rx-internal-delay-ps = <2000>;
320
321                                    fixed-link {
322                                            speed = <1000>;
323                                            full-duplex;
324                                            pause;
325                                    };
326                            };
327                    };
328
329                    mdio {
330                            compatible = "realtek,smi-mdio";
331                            #address-cells = <1>;
332                            #size-cells = <0>;
333
334                            ethphy0: ethernet-phy@0 {
335                                    reg = <0>;
336                                    interrupt-parent = <&switch_intc2>;
337                                    interrupts = <0>;
338                            };
339                            ethphy1: ethernet-phy@1 {
340                                    reg = <1>;
341                                    interrupt-parent = <&switch_intc2>;
342                                    interrupts = <1>;
343                            };
344                            ethphy2: ethernet-phy@2 {
345                                    reg = <2>;
346                                    interrupt-parent = <&switch_intc2>;
347                                    interrupts = <2>;
348                            };
349                            ethphy3: ethernet-phy@3 {
350                                    reg = <3>;
351                                    interrupt-parent = <&switch_intc2>;
352                                    interrupts = <3>;
353                            };
354                    };
355            };
356    };
357
358  - |
359    #include <dt-bindings/gpio/gpio.h>
360    #include <dt-bindings/interrupt-controller/irq.h>
361
362    mdio {
363            #address-cells = <1>;
364            #size-cells = <0>;
365
366            ethernet-switch@29 {
367                    compatible = "realtek,rtl8365mb";
368                    reg = <29>;
369
370                    reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
371
372                    switch_intc3: interrupt-controller {
373                            interrupt-parent = <&gpio0>;
374                            interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
375                            interrupt-controller;
376                            #address-cells = <0>;
377                            #interrupt-cells = <1>;
378                    };
379
380                    ethernet-ports {
381                            #address-cells = <1>;
382                            #size-cells = <0>;
383
384                            ethernet-port@0 {
385                                    reg = <0>;
386                                    label = "lan4";
387                            };
388
389                            ethernet-port@1 {
390                                    reg = <1>;
391                                    label = "lan3";
392                            };
393
394                            ethernet-port@2 {
395                                    reg = <2>;
396                                    label = "lan2";
397                            };
398
399                            ethernet-port@3 {
400                                    reg = <3>;
401                                    label = "lan1";
402                            };
403
404                            ethernet-port@4 {
405                                    reg = <4>;
406                                    label = "wan";
407                            };
408
409                            ethernet-port@7 {
410                                    reg = <7>;
411                                    ethernet = <&ethernet>;
412                                    phy-mode = "rgmii";
413                                    tx-internal-delay-ps = <2000>;
414                                    rx-internal-delay-ps = <0>;
415
416                                    fixed-link {
417                                            speed = <1000>;
418                                            full-duplex;
419                                    };
420                            };
421                    };
422            };
423      };
424