xref: /linux/Documentation/devicetree/bindings/net/dsa/qca,ar9331.yaml (revision a23e1966932464e1c5226cb9ac4ce1d5fc10ba22) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/dsa/qca,ar9331.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Atheros AR9331 built-in switch
8
9maintainers:
10  - Oleksij Rempel <o.rempel@pengutronix.de>
11
12description:
13  Qualcomm Atheros AR9331 is a switch built-in to Atheros AR9331 WiSoC and
14  addressable over internal MDIO bus. All PHYs are built-in as well.
15
16properties:
17  compatible:
18    const: qca,ar9331-switch
19
20  reg:
21    maxItems: 1
22
23  interrupts:
24    maxItems: 1
25
26  interrupt-controller: true
27
28  '#interrupt-cells':
29    const: 1
30
31  mdio:
32    $ref: /schemas/net/mdio.yaml#
33    unevaluatedProperties: false
34    properties:
35      interrupt-parent: true
36
37    patternProperties:
38      '(ethernet-)?phy@[0-4]+$':
39        type: object
40        unevaluatedProperties: false
41
42        properties:
43          reg: true
44          interrupts:
45            maxItems: 1
46
47  resets:
48    maxItems: 1
49
50  reset-names:
51    items:
52      - const: switch
53
54required:
55  - compatible
56  - reg
57  - interrupts
58  - interrupt-controller
59  - '#interrupt-cells'
60  - mdio
61  - ports
62  - resets
63  - reset-names
64
65allOf:
66  - $ref: dsa.yaml#/$defs/ethernet-ports
67
68unevaluatedProperties: false
69
70examples:
71  - |
72    mdio {
73        #address-cells = <1>;
74        #size-cells = <0>;
75
76        switch10: switch@10 {
77            compatible = "qca,ar9331-switch";
78            reg = <0x10>;
79
80            interrupt-parent = <&miscintc>;
81            interrupts = <12>;
82            interrupt-controller;
83            #interrupt-cells = <1>;
84
85            resets = <&rst 8>;
86            reset-names = "switch";
87
88            ports {
89                #address-cells = <1>;
90                #size-cells = <0>;
91
92                port@0 {
93                    reg = <0x0>;
94                    ethernet = <&eth1>;
95
96                    phy-mode = "gmii";
97
98                    fixed-link {
99                        speed = <1000>;
100                        full-duplex;
101                    };
102                };
103
104                port@1 {
105                    reg = <0x1>;
106                    phy-handle = <&phy_port0>;
107                    phy-mode = "internal";
108                };
109
110                port@2 {
111                    reg = <0x2>;
112                    phy-handle = <&phy_port1>;
113                    phy-mode = "internal";
114                };
115
116                port@3 {
117                    reg = <0x3>;
118                    phy-handle = <&phy_port2>;
119                    phy-mode = "internal";
120                };
121
122                port@4 {
123                    reg = <0x4>;
124                    phy-handle = <&phy_port3>;
125                    phy-mode = "internal";
126                };
127            };
128
129            mdio {
130                #address-cells = <1>;
131                #size-cells = <0>;
132
133                interrupt-parent = <&switch10>;
134
135                phy_port0: ethernet-phy@0 {
136                    reg = <0x0>;
137                    interrupts = <0>;
138                };
139
140                phy_port1: ethernet-phy@1 {
141                    reg = <0x1>;
142                    interrupts = <0>;
143                };
144
145                phy_port2: ethernet-phy@2 {
146                    reg = <0x2>;
147                    interrupts = <0>;
148                };
149
150                phy_port3: ethernet-phy@3 {
151                    reg = <0x3>;
152                    interrupts = <0>;
153                };
154
155                phy_port4: ethernet-phy@4 {
156                    reg = <0x4>;
157                    interrupts = <0>;
158                };
159            };
160        };
161    };
162