1*6d019124SWei Fang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*6d019124SWei Fang%YAML 1.2 3*6d019124SWei Fang--- 4*6d019124SWei Fang$id: http://devicetree.org/schemas/net/dsa/nxp,netc-switch.yaml# 5*6d019124SWei Fang$schema: http://devicetree.org/meta-schemas/core.yaml# 6*6d019124SWei Fang 7*6d019124SWei Fangtitle: NETC Switch family 8*6d019124SWei Fang 9*6d019124SWei Fangdescription: > 10*6d019124SWei Fang The NETC presents itself as a multi-function PCIe Root Complex Integrated 11*6d019124SWei Fang Endpoint (RCiEP) and provides full 802.1Q Ethernet switch functionality, 12*6d019124SWei Fang advanced QoS with 8 traffic classes and 4 drop resilience levels, and a 13*6d019124SWei Fang full range of TSN standards capabilities. 14*6d019124SWei Fang 15*6d019124SWei Fang The CPU port of the switch connects to an internal ENETC. The switch and 16*6d019124SWei Fang the internal ENETC are fully integrated into the NETC IP, a back-to-back 17*6d019124SWei Fang MAC is not required. Instead, a light-weight "pseudo MAC" provides the 18*6d019124SWei Fang delineation between the switch and ENETC. This translates to lower power 19*6d019124SWei Fang (less logic and memory) and lower delay (as there is no serialization 20*6d019124SWei Fang delay across this link). 21*6d019124SWei Fang 22*6d019124SWei Fangmaintainers: 23*6d019124SWei Fang - Wei Fang <wei.fang@nxp.com> 24*6d019124SWei Fang 25*6d019124SWei Fangproperties: 26*6d019124SWei Fang compatible: 27*6d019124SWei Fang enum: 28*6d019124SWei Fang - pci1131,eef2 29*6d019124SWei Fang 30*6d019124SWei Fang reg: 31*6d019124SWei Fang maxItems: 1 32*6d019124SWei Fang 33*6d019124SWei Fang dsa,member: 34*6d019124SWei Fang description: > 35*6d019124SWei Fang The property indicates DSA cluster and switch index. For NETC switch, 36*6d019124SWei Fang the valid range of the switch index is 1 ~ 7, the index is reflected 37*6d019124SWei Fang in the switch tag as an indication of the switch ID where the frame 38*6d019124SWei Fang originated. The value 0 is reserved for ENETC VEPA switch, whose ID 39*6d019124SWei Fang is hardwired to zero. 40*6d019124SWei Fang items: 41*6d019124SWei Fang - true 42*6d019124SWei Fang - minimum: 1 43*6d019124SWei Fang maximum: 7 44*6d019124SWei Fang 45*6d019124SWei Fang ethernet-ports: 46*6d019124SWei Fang type: object 47*6d019124SWei Fang patternProperties: 48*6d019124SWei Fang "^ethernet-port@[0-9a-f]$": 49*6d019124SWei Fang type: object 50*6d019124SWei Fang $ref: dsa-port.yaml# 51*6d019124SWei Fang 52*6d019124SWei Fang properties: 53*6d019124SWei Fang clocks: 54*6d019124SWei Fang items: 55*6d019124SWei Fang - description: MAC transmit/receive reference clock. 56*6d019124SWei Fang 57*6d019124SWei Fang clock-names: 58*6d019124SWei Fang items: 59*6d019124SWei Fang - const: ref 60*6d019124SWei Fang 61*6d019124SWei Fang mdio: 62*6d019124SWei Fang $ref: /schemas/net/mdio.yaml# 63*6d019124SWei Fang unevaluatedProperties: false 64*6d019124SWei Fang description: 65*6d019124SWei Fang Optional child node for switch port, otherwise use NETC EMDIO. 66*6d019124SWei Fang 67*6d019124SWei Fang unevaluatedProperties: false 68*6d019124SWei Fang 69*6d019124SWei Fangrequired: 70*6d019124SWei Fang - compatible 71*6d019124SWei Fang - reg 72*6d019124SWei Fang - dsa,member 73*6d019124SWei Fang - ethernet-ports 74*6d019124SWei Fang 75*6d019124SWei FangallOf: 76*6d019124SWei Fang - $ref: /schemas/pci/pci-device.yaml 77*6d019124SWei Fang - $ref: dsa.yaml# 78*6d019124SWei Fang 79*6d019124SWei FangunevaluatedProperties: false 80*6d019124SWei Fang 81*6d019124SWei Fangexamples: 82*6d019124SWei Fang - | 83*6d019124SWei Fang pcie { 84*6d019124SWei Fang #address-cells = <3>; 85*6d019124SWei Fang #size-cells = <2>; 86*6d019124SWei Fang 87*6d019124SWei Fang ethernet-switch@0,2 { 88*6d019124SWei Fang compatible = "pci1131,eef2"; 89*6d019124SWei Fang reg = <0x200 0 0 0 0>; 90*6d019124SWei Fang dsa,member = <0 1>; 91*6d019124SWei Fang pinctrl-names = "default"; 92*6d019124SWei Fang pinctrl-0 = <&pinctrl_switch>; 93*6d019124SWei Fang 94*6d019124SWei Fang ethernet-ports { 95*6d019124SWei Fang #address-cells = <1>; 96*6d019124SWei Fang #size-cells = <0>; 97*6d019124SWei Fang 98*6d019124SWei Fang ethernet-port@0 { 99*6d019124SWei Fang reg = <0>; 100*6d019124SWei Fang phy-handle = <ðphy0>; 101*6d019124SWei Fang phy-mode = "mii"; 102*6d019124SWei Fang }; 103*6d019124SWei Fang 104*6d019124SWei Fang ethernet-port@1 { 105*6d019124SWei Fang reg = <1>; 106*6d019124SWei Fang phy-handle = <ðphy1>; 107*6d019124SWei Fang phy-mode = "mii"; 108*6d019124SWei Fang }; 109*6d019124SWei Fang 110*6d019124SWei Fang ethernet-port@2 { 111*6d019124SWei Fang reg = <2>; 112*6d019124SWei Fang clocks = <&scmi_clk 103>; 113*6d019124SWei Fang clock-names = "ref"; 114*6d019124SWei Fang phy-handle = <ðphy2>; 115*6d019124SWei Fang phy-mode = "rgmii-id"; 116*6d019124SWei Fang }; 117*6d019124SWei Fang 118*6d019124SWei Fang ethernet-port@3 { 119*6d019124SWei Fang reg = <3>; 120*6d019124SWei Fang ethernet = <&enetc3>; 121*6d019124SWei Fang phy-mode = "internal"; 122*6d019124SWei Fang 123*6d019124SWei Fang fixed-link { 124*6d019124SWei Fang speed = <2500>; 125*6d019124SWei Fang full-duplex; 126*6d019124SWei Fang pause; 127*6d019124SWei Fang }; 128*6d019124SWei Fang }; 129*6d019124SWei Fang }; 130*6d019124SWei Fang }; 131*6d019124SWei Fang }; 132