xref: /linux/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml (revision a34b0e4e21d6be3c3d620aa7f9dfbf0e9550c19e) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/dsa/microchip,ksz.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip KSZ Series Ethernet switches
8
9maintainers:
10  - Marek Vasut <marex@denx.de>
11  - Woojung Huh <Woojung.Huh@microchip.com>
12
13properties:
14  # See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional
15  # required and optional properties.
16  compatible:
17    enum:
18      - microchip,ksz8463
19      - microchip,ksz8765
20      - microchip,ksz8794
21      - microchip,ksz8795
22      - microchip,ksz8863
23      - microchip,ksz8864  # 4-port version of KSZ8895 family switch
24      - microchip,ksz8873
25      - microchip,ksz8895  # 5-port version of KSZ8895 family switch
26      - microchip,ksz9477
27      - microchip,ksz9897
28      - microchip,ksz9896
29      - microchip,ksz9567
30      - microchip,ksz8565
31      - microchip,ksz9893
32      - microchip,ksz9563
33      - microchip,ksz8563
34      - microchip,ksz8567
35      - microchip,lan9646
36
37  pinctrl-names:
38    items:
39      - const: default
40      - const: reset
41        description:
42          Used during reset for strap configuration.
43    minItems: 1
44
45  reset-gpios:
46    description:
47      Should be a gpio specifier for a reset line.
48    maxItems: 1
49
50  wakeup-source: true
51
52  microchip,synclko-125:
53    $ref: /schemas/types.yaml#/definitions/flag
54    description:
55      Set if the output SYNCLKO frequency should be set to 125MHz instead of 25MHz.
56
57  microchip,synclko-disable:
58    $ref: /schemas/types.yaml#/definitions/flag
59    description:
60      Set if the output SYNCLKO clock should be disabled. Do not mix with
61      microchip,synclko-125.
62
63  microchip,pme-active-high:
64    $ref: /schemas/types.yaml#/definitions/flag
65    description:
66      Indicates if the PME pin polarity is active-high.
67
68  microchip,io-drive-strength-microamp:
69    description:
70      IO Pad Drive Strength
71    enum: [8000, 16000]
72    default: 16000
73
74  microchip,hi-drive-strength-microamp:
75    description:
76      High Speed Drive Strength. Controls drive strength of GMII / RGMII /
77      MII / RMII (except TX_CLK/REFCLKI, COL and CRS) and CLKO_25_125 lines.
78    enum: [2000, 4000, 8000, 12000, 16000, 20000, 24000, 28000]
79    default: 24000
80
81  microchip,lo-drive-strength-microamp:
82    description:
83      Low Speed Drive Strength. Controls drive strength of TX_CLK / REFCLKI,
84      COL, CRS, LEDs, PME_N, NTRP_N, SDO and SDI/SDA/MDIO lines.
85    enum: [2000, 4000, 8000, 12000, 16000, 20000, 24000, 28000]
86    default: 8000
87
88  interrupts:
89    maxItems: 1
90
91  mdio:
92    $ref: /schemas/net/mdio.yaml#
93    unevaluatedProperties: false
94    properties:
95      mdio-parent-bus:
96        $ref: /schemas/types.yaml#/definitions/phandle
97        description:
98          Phandle pointing to the MDIO bus controller connected to the
99          secondary MDIO interface. This property should be used when
100          the internal MDIO bus is accessed via a secondary MDIO
101          interface rather than the primary management interface.
102
103    patternProperties:
104      "^ethernet-phy@[0-9a-f]$":
105        type: object
106        $ref: /schemas/net/ethernet-phy.yaml#
107        unevaluatedProperties: false
108        description:
109          Integrated PHY node
110
111required:
112  - compatible
113  - reg
114
115allOf:
116  - $ref: /schemas/spi/spi-peripheral-props.yaml#
117
118  - if:
119      not:
120        properties:
121          compatible:
122            enum:
123              - microchip,ksz8863
124              - microchip,ksz8873
125    then:
126      $ref: dsa.yaml#/$defs/ethernet-ports
127    else:
128      patternProperties:
129        "^(ethernet-)?ports$":
130          patternProperties:
131            "^(ethernet-)?port@[0-2]$":
132              $ref: dsa-port.yaml#
133              unevaluatedProperties: false
134              properties:
135                microchip,rmii-clk-internal:
136                  $ref: /schemas/types.yaml#/definitions/flag
137                  description:
138                    When ksz88x3 is acting as clock provier (via REFCLKO) it
139                    can select between internal and external RMII reference
140                    clock. Internal reference clock means that the clock for
141                    the RMII of ksz88x3 is provided by the ksz88x3 internally
142                    and the REFCLKI pin is unconnected. For the external
143                    reference clock, the clock needs to be fed back to ksz88x3
144                    via REFCLKI.
145                    If microchip,rmii-clk-internal is set, ksz88x3 will provide
146                    rmii reference clock internally, otherwise reference clock
147                    should be provided externally.
148              dependencies:
149                microchip,rmii-clk-internal: [ethernet]
150  - if:
151      properties:
152        compatible:
153          contains:
154            const: microchip,ksz8463
155    then:
156      properties:
157        pinctrl-names:
158          minItems: 2
159        straps-rxd-gpios:
160          description:
161            RXD0 and RXD1 pins, used to select SPI as bus interface.
162          minItems: 2
163          maxItems: 2
164
165unevaluatedProperties: false
166
167examples:
168  - |
169    #include <dt-bindings/gpio/gpio.h>
170
171    // Ethernet switch connected via SPI to the host, CPU port wired to eth0:
172    eth0 {
173        fixed-link {
174            speed = <1000>;
175            full-duplex;
176        };
177    };
178
179    spi {
180        #address-cells = <1>;
181        #size-cells = <0>;
182
183        pinctrl-0 = <&pinctrl_spi_ksz>;
184        cs-gpios = <&pioC 25 0>;
185
186        ksz9477: switch@0 {
187            compatible = "microchip,ksz9477";
188            reg = <0>;
189            reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
190
191            spi-max-frequency = <44000000>;
192
193            ethernet-ports {
194                #address-cells = <1>;
195                #size-cells = <0>;
196                port@0 {
197                    reg = <0>;
198                    label = "lan1";
199                };
200                port@1 {
201                    reg = <1>;
202                    label = "lan2";
203                };
204                port@2 {
205                    reg = <2>;
206                    label = "lan3";
207                };
208                port@3 {
209                    reg = <3>;
210                    label = "lan4";
211                };
212                port@4 {
213                    reg = <4>;
214                    label = "lan5";
215                };
216                port@5 {
217                    reg = <5>;
218                    ethernet = <&eth0>;
219                    phy-mode = "rgmii";
220
221                    fixed-link {
222                        speed = <1000>;
223                        full-duplex;
224                    };
225                };
226            };
227        };
228
229        ksz8565: switch@1 {
230            compatible = "microchip,ksz8565";
231            reg = <1>;
232
233            spi-max-frequency = <44000000>;
234
235            ethernet-ports {
236                #address-cells = <1>;
237                #size-cells = <0>;
238                port@0 {
239                    reg = <0>;
240                    label = "lan1";
241                };
242                port@1 {
243                    reg = <1>;
244                    label = "lan2";
245                };
246                port@2 {
247                    reg = <2>;
248                    label = "lan3";
249                };
250                port@3 {
251                    reg = <3>;
252                    label = "lan4";
253                };
254                port@6 {
255                    reg = <6>;
256                    ethernet = <&eth0>;
257                    phy-mode = "rgmii";
258
259                    fixed-link {
260                        speed = <1000>;
261                        full-duplex;
262                    };
263                };
264            };
265        };
266    };
267...
268