xref: /linux/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml (revision 8b6d678fede700db6466d73f11fcbad496fa515e) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/dsa/microchip,ksz.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip KSZ Series Ethernet switches
8
9maintainers:
10  - Marek Vasut <marex@denx.de>
11  - Woojung Huh <Woojung.Huh@microchip.com>
12
13allOf:
14  - $ref: /schemas/spi/spi-peripheral-props.yaml#
15
16properties:
17  # See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional
18  # required and optional properties.
19  compatible:
20    enum:
21      - microchip,ksz8765
22      - microchip,ksz8794
23      - microchip,ksz8795
24      - microchip,ksz8863
25      - microchip,ksz8873
26      - microchip,ksz9477
27      - microchip,ksz9897
28      - microchip,ksz9896
29      - microchip,ksz9567
30      - microchip,ksz8565
31      - microchip,ksz9893
32      - microchip,ksz9563
33      - microchip,ksz8563
34      - microchip,ksz8567
35
36  reset-gpios:
37    description:
38      Should be a gpio specifier for a reset line.
39    maxItems: 1
40
41  wakeup-source: true
42
43  microchip,synclko-125:
44    $ref: /schemas/types.yaml#/definitions/flag
45    description:
46      Set if the output SYNCLKO frequency should be set to 125MHz instead of 25MHz.
47
48  microchip,synclko-disable:
49    $ref: /schemas/types.yaml#/definitions/flag
50    description:
51      Set if the output SYNCLKO clock should be disabled. Do not mix with
52      microchip,synclko-125.
53
54  microchip,io-drive-strength-microamp:
55    description:
56      IO Pad Drive Strength
57    enum: [8000, 16000]
58    default: 16000
59
60  microchip,hi-drive-strength-microamp:
61    description:
62      High Speed Drive Strength. Controls drive strength of GMII / RGMII /
63      MII / RMII (except TX_CLK/REFCLKI, COL and CRS) and CLKO_25_125 lines.
64    enum: [2000, 4000, 8000, 12000, 16000, 20000, 24000, 28000]
65    default: 24000
66
67  microchip,lo-drive-strength-microamp:
68    description:
69      Low Speed Drive Strength. Controls drive strength of TX_CLK / REFCLKI,
70      COL, CRS, LEDs, PME_N, NTRP_N, SDO and SDI/SDA/MDIO lines.
71    enum: [2000, 4000, 8000, 12000, 16000, 20000, 24000, 28000]
72    default: 8000
73
74  interrupts:
75    maxItems: 1
76
77required:
78  - compatible
79  - reg
80
81if:
82  not:
83    properties:
84      compatible:
85        enum:
86          - microchip,ksz8863
87          - microchip,ksz8873
88then:
89  $ref: dsa.yaml#/$defs/ethernet-ports
90else:
91  patternProperties:
92    "^(ethernet-)?ports$":
93      patternProperties:
94        "^(ethernet-)?port@[0-2]$":
95          $ref: dsa-port.yaml#
96          unevaluatedProperties: false
97          properties:
98            microchip,rmii-clk-internal:
99              $ref: /schemas/types.yaml#/definitions/flag
100              description:
101                When ksz88x3 is acting as clock provier (via REFCLKO) it
102                can select between internal and external RMII reference
103                clock. Internal reference clock means that the clock for
104                the RMII of ksz88x3 is provided by the ksz88x3 internally
105                and the REFCLKI pin is unconnected. For the external
106                reference clock, the clock needs to be fed back to ksz88x3
107                via REFCLKI.
108                If microchip,rmii-clk-internal is set, ksz88x3 will provide
109                rmii reference clock internally, otherwise reference clock
110                should be provided externally.
111          dependencies:
112            microchip,rmii-clk-internal: [ethernet]
113
114unevaluatedProperties: false
115
116examples:
117  - |
118    #include <dt-bindings/gpio/gpio.h>
119
120    // Ethernet switch connected via SPI to the host, CPU port wired to eth0:
121    eth0 {
122        fixed-link {
123            speed = <1000>;
124            full-duplex;
125        };
126    };
127
128    spi {
129        #address-cells = <1>;
130        #size-cells = <0>;
131
132        pinctrl-0 = <&pinctrl_spi_ksz>;
133        cs-gpios = <&pioC 25 0>;
134        id = <1>;
135
136        ksz9477: switch@0 {
137            compatible = "microchip,ksz9477";
138            reg = <0>;
139            reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
140
141            spi-max-frequency = <44000000>;
142
143            ethernet-ports {
144                #address-cells = <1>;
145                #size-cells = <0>;
146                port@0 {
147                    reg = <0>;
148                    label = "lan1";
149                };
150                port@1 {
151                    reg = <1>;
152                    label = "lan2";
153                };
154                port@2 {
155                    reg = <2>;
156                    label = "lan3";
157                };
158                port@3 {
159                    reg = <3>;
160                    label = "lan4";
161                };
162                port@4 {
163                    reg = <4>;
164                    label = "lan5";
165                };
166                port@5 {
167                    reg = <5>;
168                    ethernet = <&eth0>;
169                    phy-mode = "rgmii";
170
171                    fixed-link {
172                        speed = <1000>;
173                        full-duplex;
174                    };
175                };
176            };
177        };
178
179        ksz8565: switch@1 {
180            compatible = "microchip,ksz8565";
181            reg = <1>;
182
183            spi-max-frequency = <44000000>;
184
185            ethernet-ports {
186                #address-cells = <1>;
187                #size-cells = <0>;
188                port@0 {
189                    reg = <0>;
190                    label = "lan1";
191                };
192                port@1 {
193                    reg = <1>;
194                    label = "lan2";
195                };
196                port@2 {
197                    reg = <2>;
198                    label = "lan3";
199                };
200                port@3 {
201                    reg = <3>;
202                    label = "lan4";
203                };
204                port@6 {
205                    reg = <6>;
206                    ethernet = <&eth0>;
207                    phy-mode = "rgmii";
208
209                    fixed-link {
210                        speed = <1000>;
211                        full-duplex;
212                    };
213                };
214            };
215        };
216    };
217...
218