xref: /linux/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml (revision 34dc1baba215b826e454b8d19e4f24adbeb7d00d) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/dsa/microchip,ksz.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip KSZ Series Ethernet switches
8
9maintainers:
10  - Marek Vasut <marex@denx.de>
11  - Woojung Huh <Woojung.Huh@microchip.com>
12
13allOf:
14  - $ref: dsa.yaml#/$defs/ethernet-ports
15  - $ref: /schemas/spi/spi-peripheral-props.yaml#
16
17properties:
18  # See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional
19  # required and optional properties.
20  compatible:
21    enum:
22      - microchip,ksz8765
23      - microchip,ksz8794
24      - microchip,ksz8795
25      - microchip,ksz8863
26      - microchip,ksz8873
27      - microchip,ksz9477
28      - microchip,ksz9897
29      - microchip,ksz9896
30      - microchip,ksz9567
31      - microchip,ksz8565
32      - microchip,ksz9893
33      - microchip,ksz9563
34      - microchip,ksz8563
35
36  reset-gpios:
37    description:
38      Should be a gpio specifier for a reset line.
39    maxItems: 1
40
41  microchip,synclko-125:
42    $ref: /schemas/types.yaml#/definitions/flag
43    description:
44      Set if the output SYNCLKO frequency should be set to 125MHz instead of 25MHz.
45
46  microchip,synclko-disable:
47    $ref: /schemas/types.yaml#/definitions/flag
48    description:
49      Set if the output SYNCLKO clock should be disabled. Do not mix with
50      microchip,synclko-125.
51
52  interrupts:
53    maxItems: 1
54
55required:
56  - compatible
57  - reg
58
59unevaluatedProperties: false
60
61examples:
62  - |
63    #include <dt-bindings/gpio/gpio.h>
64
65    // Ethernet switch connected via SPI to the host, CPU port wired to eth0:
66    eth0 {
67        fixed-link {
68            speed = <1000>;
69            full-duplex;
70        };
71    };
72
73    spi {
74        #address-cells = <1>;
75        #size-cells = <0>;
76
77        pinctrl-0 = <&pinctrl_spi_ksz>;
78        cs-gpios = <&pioC 25 0>;
79        id = <1>;
80
81        ksz9477: switch@0 {
82            compatible = "microchip,ksz9477";
83            reg = <0>;
84            reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
85
86            spi-max-frequency = <44000000>;
87
88            ethernet-ports {
89                #address-cells = <1>;
90                #size-cells = <0>;
91                port@0 {
92                    reg = <0>;
93                    label = "lan1";
94                };
95                port@1 {
96                    reg = <1>;
97                    label = "lan2";
98                };
99                port@2 {
100                    reg = <2>;
101                    label = "lan3";
102                };
103                port@3 {
104                    reg = <3>;
105                    label = "lan4";
106                };
107                port@4 {
108                    reg = <4>;
109                    label = "lan5";
110                };
111                port@5 {
112                    reg = <5>;
113                    ethernet = <&eth0>;
114                    phy-mode = "rgmii";
115
116                    fixed-link {
117                        speed = <1000>;
118                        full-duplex;
119                    };
120                };
121            };
122        };
123
124        ksz8565: switch@1 {
125            compatible = "microchip,ksz8565";
126            reg = <1>;
127
128            spi-max-frequency = <44000000>;
129
130            ethernet-ports {
131                #address-cells = <1>;
132                #size-cells = <0>;
133                port@0 {
134                    reg = <0>;
135                    label = "lan1";
136                };
137                port@1 {
138                    reg = <1>;
139                    label = "lan2";
140                };
141                port@2 {
142                    reg = <2>;
143                    label = "lan3";
144                };
145                port@3 {
146                    reg = <3>;
147                    label = "lan4";
148                };
149                port@6 {
150                    reg = <6>;
151                    ethernet = <&eth0>;
152                    phy-mode = "rgmii";
153
154                    fixed-link {
155                        speed = <1000>;
156                        full-duplex;
157                    };
158                };
159            };
160        };
161    };
162...
163