xref: /linux/Documentation/devicetree/bindings/net/dsa/mediatek,mt7628-esw.yaml (revision 91ec2035134982b98fab0609a9fd8480e8217dc1)
1*2873d364SJoris Vaisvila# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*2873d364SJoris Vaisvila%YAML 1.2
3*2873d364SJoris Vaisvila---
4*2873d364SJoris Vaisvila$id: http://devicetree.org/schemas/net/dsa/mediatek,mt7628-esw.yaml#
5*2873d364SJoris Vaisvila$schema: http://devicetree.org/meta-schemas/core.yaml#
6*2873d364SJoris Vaisvila
7*2873d364SJoris Vaisvilatitle: Mediatek MT7628 Embedded Ethernet Switch
8*2873d364SJoris Vaisvila
9*2873d364SJoris Vaisvilamaintainers:
10*2873d364SJoris Vaisvila  - Joris Vaisvila <joey@tinyisr.com>
11*2873d364SJoris Vaisvila
12*2873d364SJoris Vaisviladescription:
13*2873d364SJoris Vaisvila  The MT7628 SoC's built-in Ethernet Switch has five user ports and one
14*2873d364SJoris Vaisvila  internally connected CPU port. The user ports are all connected to the SoC's
15*2873d364SJoris Vaisvila  integrated Fast Ethernet PHYs. The switch registers are directly mapped in
16*2873d364SJoris Vaisvila  the SoC's memory.
17*2873d364SJoris Vaisvila
18*2873d364SJoris VaisvilaallOf:
19*2873d364SJoris Vaisvila  - $ref: dsa.yaml#/$defs/ethernet-ports
20*2873d364SJoris Vaisvila
21*2873d364SJoris Vaisvilaproperties:
22*2873d364SJoris Vaisvila  compatible:
23*2873d364SJoris Vaisvila    const: mediatek,mt7628-esw
24*2873d364SJoris Vaisvila
25*2873d364SJoris Vaisvila  reg:
26*2873d364SJoris Vaisvila    maxItems: 1
27*2873d364SJoris Vaisvila
28*2873d364SJoris Vaisvila  resets:
29*2873d364SJoris Vaisvila    items:
30*2873d364SJoris Vaisvila      - description: internal switch block reset
31*2873d364SJoris Vaisvila      - description: internal phy package reset
32*2873d364SJoris Vaisvila
33*2873d364SJoris Vaisvila  reset-names:
34*2873d364SJoris Vaisvila    items:
35*2873d364SJoris Vaisvila      - const: esw
36*2873d364SJoris Vaisvila      - const: ephy
37*2873d364SJoris Vaisvila
38*2873d364SJoris Vaisvilarequired:
39*2873d364SJoris Vaisvila  - compatible
40*2873d364SJoris Vaisvila  - reg
41*2873d364SJoris Vaisvila  - resets
42*2873d364SJoris Vaisvila  - reset-names
43*2873d364SJoris Vaisvila  - ethernet-ports
44*2873d364SJoris Vaisvila
45*2873d364SJoris VaisvilaunevaluatedProperties: false
46*2873d364SJoris Vaisvila
47*2873d364SJoris Vaisvilaexamples:
48*2873d364SJoris Vaisvila  - |
49*2873d364SJoris Vaisvila    switch@10110000 {
50*2873d364SJoris Vaisvila        compatible = "mediatek,mt7628-esw";
51*2873d364SJoris Vaisvila        reg = <0x10110000 0x8000>;
52*2873d364SJoris Vaisvila
53*2873d364SJoris Vaisvila        resets = <&sysc 23>, <&sysc 24>;
54*2873d364SJoris Vaisvila        reset-names = "esw", "ephy";
55*2873d364SJoris Vaisvila
56*2873d364SJoris Vaisvila        ethernet-ports {
57*2873d364SJoris Vaisvila            #address-cells = <1>;
58*2873d364SJoris Vaisvila            #size-cells = <0>;
59*2873d364SJoris Vaisvila
60*2873d364SJoris Vaisvila            ethernet-port@0 {
61*2873d364SJoris Vaisvila                reg = <0>;
62*2873d364SJoris Vaisvila                phy-mode = "internal";
63*2873d364SJoris Vaisvila            };
64*2873d364SJoris Vaisvila
65*2873d364SJoris Vaisvila            ethernet-port@1 {
66*2873d364SJoris Vaisvila                reg = <1>;
67*2873d364SJoris Vaisvila                phy-mode = "internal";
68*2873d364SJoris Vaisvila            };
69*2873d364SJoris Vaisvila
70*2873d364SJoris Vaisvila            ethernet-port@2 {
71*2873d364SJoris Vaisvila                reg = <2>;
72*2873d364SJoris Vaisvila                phy-mode = "internal";
73*2873d364SJoris Vaisvila            };
74*2873d364SJoris Vaisvila
75*2873d364SJoris Vaisvila            ethernet-port@3 {
76*2873d364SJoris Vaisvila                reg = <3>;
77*2873d364SJoris Vaisvila                phy-mode = "internal";
78*2873d364SJoris Vaisvila            };
79*2873d364SJoris Vaisvila
80*2873d364SJoris Vaisvila            ethernet-port@4 {
81*2873d364SJoris Vaisvila                reg = <4>;
82*2873d364SJoris Vaisvila                phy-mode = "internal";
83*2873d364SJoris Vaisvila            };
84*2873d364SJoris Vaisvila
85*2873d364SJoris Vaisvila            ethernet-port@6 {
86*2873d364SJoris Vaisvila                reg = <6>;
87*2873d364SJoris Vaisvila                phy-mode = "internal";
88*2873d364SJoris Vaisvila                ethernet = <&ethernet>;
89*2873d364SJoris Vaisvila
90*2873d364SJoris Vaisvila                fixed-link {
91*2873d364SJoris Vaisvila                    speed = <1000>;
92*2873d364SJoris Vaisvila                    full-duplex;
93*2873d364SJoris Vaisvila                };
94*2873d364SJoris Vaisvila            };
95*2873d364SJoris Vaisvila        };
96*2873d364SJoris Vaisvila    };
97