xref: /linux/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml (revision 06d07429858317ded2db7986113a9e0129cd599b)
1*43915b2fSLinus Walleij# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*43915b2fSLinus Walleij%YAML 1.2
3*43915b2fSLinus Walleij---
4*43915b2fSLinus Walleij$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml#
5*43915b2fSLinus Walleij$schema: http://devicetree.org/meta-schemas/core.yaml#
6*43915b2fSLinus Walleij
7*43915b2fSLinus Walleijtitle: Marvell MV88E6xxx DSA switch family
8*43915b2fSLinus Walleij
9*43915b2fSLinus Walleijmaintainers:
10*43915b2fSLinus Walleij  - Andrew Lunn <andrew@lunn.ch>
11*43915b2fSLinus Walleij
12*43915b2fSLinus Walleijdescription:
13*43915b2fSLinus Walleij  The Marvell MV88E6xxx switch series has been produced and sold
14*43915b2fSLinus Walleij  by Marvell since at least 2008. The switch has a few compatibles which
15*43915b2fSLinus Walleij  just indicate the base address of the switch, then operating systems
16*43915b2fSLinus Walleij  can investigate switch ID registers to find out which actual version
17*43915b2fSLinus Walleij  of the switch it is dealing with.
18*43915b2fSLinus Walleij
19*43915b2fSLinus Walleijproperties:
20*43915b2fSLinus Walleij  compatible:
21*43915b2fSLinus Walleij    oneOf:
22*43915b2fSLinus Walleij      - enum:
23*43915b2fSLinus Walleij          - marvell,mv88e6085
24*43915b2fSLinus Walleij          - marvell,mv88e6190
25*43915b2fSLinus Walleij          - marvell,mv88e6250
26*43915b2fSLinus Walleij        description: |
27*43915b2fSLinus Walleij          marvell,mv88e6085: This switch uses base address 0x10.
28*43915b2fSLinus Walleij            This switch and its siblings will be autodetected from
29*43915b2fSLinus Walleij            ID registers found in the switch, so only "marvell,mv88e6085" should be
30*43915b2fSLinus Walleij            specified. This includes the following list of MV88Exxxx switches:
31*43915b2fSLinus Walleij            6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, 6171, 6172, 6175, 6176,
32*43915b2fSLinus Walleij            6185, 6240, 6320, 6321, 6341, 6350, 6351, 6352
33*43915b2fSLinus Walleij          marvell,mv88e6190: This switch uses base address 0x00.
34*43915b2fSLinus Walleij            This switch and its siblings will be autodetected from
35*43915b2fSLinus Walleij            ID registers found in the switch, so only "marvell,mv88e6190" should be
36*43915b2fSLinus Walleij            specified. This includes the following list of MV88Exxxx switches:
37*43915b2fSLinus Walleij            6190, 6190X, 6191, 6290, 6361, 6390, 6390X
38*43915b2fSLinus Walleij          marvell,mv88e6250: This switch uses base address 0x08 or 0x18.
39*43915b2fSLinus Walleij            This switch and its siblings will be autodetected from
40*43915b2fSLinus Walleij            ID registers found in the switch, so only "marvell,mv88e6250" should be
41*43915b2fSLinus Walleij            specified. This includes the following list of MV88Exxxx switches:
42*43915b2fSLinus Walleij            6220, 6250
43*43915b2fSLinus Walleij      - items:
44*43915b2fSLinus Walleij          - const: marvell,turris-mox-mv88e6085
45*43915b2fSLinus Walleij          - const: marvell,mv88e6085
46*43915b2fSLinus Walleij      - items:
47*43915b2fSLinus Walleij          - const: marvell,turris-mox-mv88e6190
48*43915b2fSLinus Walleij          - const: marvell,mv88e6190
49*43915b2fSLinus Walleij
50*43915b2fSLinus Walleij  reg:
51*43915b2fSLinus Walleij    maxItems: 1
52*43915b2fSLinus Walleij
53*43915b2fSLinus Walleij  eeprom-length:
54*43915b2fSLinus Walleij    $ref: /schemas/types.yaml#/definitions/uint32
55*43915b2fSLinus Walleij    description: Set to the length of an EEPROM connected to the switch. Must be
56*43915b2fSLinus Walleij      set if the switch can not detect the presence and/or size of a connected
57*43915b2fSLinus Walleij      EEPROM, otherwise optional.
58*43915b2fSLinus Walleij
59*43915b2fSLinus Walleij  reset-gpios:
60*43915b2fSLinus Walleij    description:
61*43915b2fSLinus Walleij      GPIO to be used to reset the whole device
62*43915b2fSLinus Walleij    maxItems: 1
63*43915b2fSLinus Walleij
64*43915b2fSLinus Walleij  interrupts:
65*43915b2fSLinus Walleij    description: The switch provides an external interrupt line, but it is
66*43915b2fSLinus Walleij      not always used by target systems.
67*43915b2fSLinus Walleij    maxItems: 1
68*43915b2fSLinus Walleij
69*43915b2fSLinus Walleij  interrupt-controller:
70*43915b2fSLinus Walleij    description: The switch has an internal interrupt controller used by
71*43915b2fSLinus Walleij      the different sub-blocks.
72*43915b2fSLinus Walleij
73*43915b2fSLinus Walleij  '#interrupt-cells':
74*43915b2fSLinus Walleij    description: The internal interrupt controller only supports triggering
75*43915b2fSLinus Walleij      on active high level interrupts so the second cell must alway be set to
76*43915b2fSLinus Walleij      IRQ_TYPE_LEVEL_HIGH.
77*43915b2fSLinus Walleij    const: 2
78*43915b2fSLinus Walleij
79*43915b2fSLinus Walleij  mdio:
80*43915b2fSLinus Walleij    $ref: /schemas/net/mdio.yaml#
81*43915b2fSLinus Walleij    unevaluatedProperties: false
82*43915b2fSLinus Walleij    description: Marvell MV88E6xxx switches have an varying combination of
83*43915b2fSLinus Walleij      internal and external MDIO buses, in some cases a combined bus that
84*43915b2fSLinus Walleij      can be used both internally and externally. This node is for the
85*43915b2fSLinus Walleij      primary bus, used internally and sometimes also externally.
86*43915b2fSLinus Walleij
87*43915b2fSLinus Walleij  mdio-external:
88*43915b2fSLinus Walleij    $ref: /schemas/net/mdio.yaml#
89*43915b2fSLinus Walleij    unevaluatedProperties: false
90*43915b2fSLinus Walleij    description: Marvell MV88E6xxx switches that have a separate external
91*43915b2fSLinus Walleij      MDIO bus use this port to access external components on the MDIO bus.
92*43915b2fSLinus Walleij
93*43915b2fSLinus Walleij    properties:
94*43915b2fSLinus Walleij      compatible:
95*43915b2fSLinus Walleij        const: marvell,mv88e6xxx-mdio-external
96*43915b2fSLinus Walleij
97*43915b2fSLinus Walleij    required:
98*43915b2fSLinus Walleij      - compatible
99*43915b2fSLinus Walleij
100*43915b2fSLinus WalleijallOf:
101*43915b2fSLinus Walleij  - $ref: dsa.yaml#/$defs/ethernet-ports
102*43915b2fSLinus Walleij
103*43915b2fSLinus Walleijrequired:
104*43915b2fSLinus Walleij  - compatible
105*43915b2fSLinus Walleij  - reg
106*43915b2fSLinus Walleij
107*43915b2fSLinus WalleijunevaluatedProperties: false
108*43915b2fSLinus Walleij
109*43915b2fSLinus Walleijexamples:
110*43915b2fSLinus Walleij  - |
111*43915b2fSLinus Walleij    #include <dt-bindings/gpio/gpio.h>
112*43915b2fSLinus Walleij    mdio {
113*43915b2fSLinus Walleij        #address-cells = <1>;
114*43915b2fSLinus Walleij        #size-cells = <0>;
115*43915b2fSLinus Walleij
116*43915b2fSLinus Walleij        ethernet-switch@0 {
117*43915b2fSLinus Walleij            compatible = "marvell,mv88e6085";
118*43915b2fSLinus Walleij            reg = <0>;
119*43915b2fSLinus Walleij            reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
120*43915b2fSLinus Walleij
121*43915b2fSLinus Walleij            mdio {
122*43915b2fSLinus Walleij                #address-cells = <1>;
123*43915b2fSLinus Walleij                #size-cells = <0>;
124*43915b2fSLinus Walleij
125*43915b2fSLinus Walleij                sw_phy0: ethernet-phy@0 {
126*43915b2fSLinus Walleij                    reg = <0x0>;
127*43915b2fSLinus Walleij                };
128*43915b2fSLinus Walleij
129*43915b2fSLinus Walleij                sw_phy1: ethernet-phy@1 {
130*43915b2fSLinus Walleij                    reg = <0x1>;
131*43915b2fSLinus Walleij                };
132*43915b2fSLinus Walleij
133*43915b2fSLinus Walleij                sw_phy2: ethernet-phy@2 {
134*43915b2fSLinus Walleij                    reg = <0x2>;
135*43915b2fSLinus Walleij                };
136*43915b2fSLinus Walleij
137*43915b2fSLinus Walleij                sw_phy3: ethernet-phy@3 {
138*43915b2fSLinus Walleij                    reg = <0x3>;
139*43915b2fSLinus Walleij                };
140*43915b2fSLinus Walleij            };
141*43915b2fSLinus Walleij
142*43915b2fSLinus Walleij            ethernet-ports {
143*43915b2fSLinus Walleij                #address-cells = <1>;
144*43915b2fSLinus Walleij                #size-cells = <0>;
145*43915b2fSLinus Walleij
146*43915b2fSLinus Walleij                ethernet-port@0 {
147*43915b2fSLinus Walleij                    reg = <0>;
148*43915b2fSLinus Walleij                    label = "lan4";
149*43915b2fSLinus Walleij                    phy-handle = <&sw_phy0>;
150*43915b2fSLinus Walleij                    phy-mode = "internal";
151*43915b2fSLinus Walleij                };
152*43915b2fSLinus Walleij
153*43915b2fSLinus Walleij                ethernet-port@1 {
154*43915b2fSLinus Walleij                    reg = <1>;
155*43915b2fSLinus Walleij                    label = "lan3";
156*43915b2fSLinus Walleij                    phy-handle = <&sw_phy1>;
157*43915b2fSLinus Walleij                    phy-mode = "internal";
158*43915b2fSLinus Walleij                };
159*43915b2fSLinus Walleij
160*43915b2fSLinus Walleij                ethernet-port@2 {
161*43915b2fSLinus Walleij                    reg = <2>;
162*43915b2fSLinus Walleij                    label = "lan2";
163*43915b2fSLinus Walleij                    phy-handle = <&sw_phy2>;
164*43915b2fSLinus Walleij                    phy-mode = "internal";
165*43915b2fSLinus Walleij                };
166*43915b2fSLinus Walleij
167*43915b2fSLinus Walleij                ethernet-port@3 {
168*43915b2fSLinus Walleij                    reg = <3>;
169*43915b2fSLinus Walleij                    label = "lan1";
170*43915b2fSLinus Walleij                    phy-handle = <&sw_phy3>;
171*43915b2fSLinus Walleij                    phy-mode = "internal";
172*43915b2fSLinus Walleij                };
173*43915b2fSLinus Walleij
174*43915b2fSLinus Walleij                ethernet-port@5 {
175*43915b2fSLinus Walleij                    reg = <5>;
176*43915b2fSLinus Walleij                    ethernet = <&fec>;
177*43915b2fSLinus Walleij                    phy-mode = "rgmii-id";
178*43915b2fSLinus Walleij
179*43915b2fSLinus Walleij                    fixed-link {
180*43915b2fSLinus Walleij                        speed = <1000>;
181*43915b2fSLinus Walleij                        full-duplex;
182*43915b2fSLinus Walleij                    };
183*43915b2fSLinus Walleij                };
184*43915b2fSLinus Walleij            };
185*43915b2fSLinus Walleij        };
186*43915b2fSLinus Walleij    };
187*43915b2fSLinus Walleij  - |
188*43915b2fSLinus Walleij    #include <dt-bindings/interrupt-controller/irq.h>
189*43915b2fSLinus Walleij    mdio {
190*43915b2fSLinus Walleij        #address-cells = <1>;
191*43915b2fSLinus Walleij        #size-cells = <0>;
192*43915b2fSLinus Walleij
193*43915b2fSLinus Walleij        ethernet-switch@0 {
194*43915b2fSLinus Walleij            compatible = "marvell,mv88e6190";
195*43915b2fSLinus Walleij            #interrupt-cells = <2>;
196*43915b2fSLinus Walleij            interrupt-controller;
197*43915b2fSLinus Walleij            interrupt-parent = <&gpio1>;
198*43915b2fSLinus Walleij            interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
199*43915b2fSLinus Walleij            pinctrl-0 = <&switch_interrupt_pins>;
200*43915b2fSLinus Walleij            pinctrl-names = "default";
201*43915b2fSLinus Walleij            reg = <0>;
202*43915b2fSLinus Walleij
203*43915b2fSLinus Walleij            mdio {
204*43915b2fSLinus Walleij                #address-cells = <1>;
205*43915b2fSLinus Walleij                #size-cells = <0>;
206*43915b2fSLinus Walleij
207*43915b2fSLinus Walleij                switch0phy1: ethernet-phy@1 {
208*43915b2fSLinus Walleij                    reg = <0x1>;
209*43915b2fSLinus Walleij                };
210*43915b2fSLinus Walleij
211*43915b2fSLinus Walleij                switch0phy2: ethernet-phy@2 {
212*43915b2fSLinus Walleij                    reg = <0x2>;
213*43915b2fSLinus Walleij                };
214*43915b2fSLinus Walleij
215*43915b2fSLinus Walleij                switch0phy3: ethernet-phy@3 {
216*43915b2fSLinus Walleij                    reg = <0x3>;
217*43915b2fSLinus Walleij                };
218*43915b2fSLinus Walleij
219*43915b2fSLinus Walleij                switch0phy4: ethernet-phy@4 {
220*43915b2fSLinus Walleij                    reg = <0x4>;
221*43915b2fSLinus Walleij                };
222*43915b2fSLinus Walleij
223*43915b2fSLinus Walleij                switch0phy5: ethernet-phy@5 {
224*43915b2fSLinus Walleij                    reg = <0x5>;
225*43915b2fSLinus Walleij                };
226*43915b2fSLinus Walleij
227*43915b2fSLinus Walleij                switch0phy6: ethernet-phy@6 {
228*43915b2fSLinus Walleij                    reg = <0x6>;
229*43915b2fSLinus Walleij                };
230*43915b2fSLinus Walleij
231*43915b2fSLinus Walleij                switch0phy7: ethernet-phy@7 {
232*43915b2fSLinus Walleij                    reg = <0x7>;
233*43915b2fSLinus Walleij                };
234*43915b2fSLinus Walleij
235*43915b2fSLinus Walleij                switch0phy8: ethernet-phy@8 {
236*43915b2fSLinus Walleij                    reg = <0x8>;
237*43915b2fSLinus Walleij                };
238*43915b2fSLinus Walleij            };
239*43915b2fSLinus Walleij
240*43915b2fSLinus Walleij            mdio-external {
241*43915b2fSLinus Walleij                compatible = "marvell,mv88e6xxx-mdio-external";
242*43915b2fSLinus Walleij                #address-cells = <1>;
243*43915b2fSLinus Walleij                #size-cells = <0>;
244*43915b2fSLinus Walleij
245*43915b2fSLinus Walleij                phy1: ethernet-phy@b {
246*43915b2fSLinus Walleij                    reg = <0xb>;
247*43915b2fSLinus Walleij                    compatible = "ethernet-phy-ieee802.3-c45";
248*43915b2fSLinus Walleij                };
249*43915b2fSLinus Walleij
250*43915b2fSLinus Walleij                phy2: ethernet-phy@c {
251*43915b2fSLinus Walleij                    reg = <0xc>;
252*43915b2fSLinus Walleij                    compatible = "ethernet-phy-ieee802.3-c45";
253*43915b2fSLinus Walleij                };
254*43915b2fSLinus Walleij            };
255*43915b2fSLinus Walleij
256*43915b2fSLinus Walleij            ethernet-ports {
257*43915b2fSLinus Walleij                #address-cells = <1>;
258*43915b2fSLinus Walleij                #size-cells = <0>;
259*43915b2fSLinus Walleij
260*43915b2fSLinus Walleij                ethernet-port@0 {
261*43915b2fSLinus Walleij                    ethernet = <&eth0>;
262*43915b2fSLinus Walleij                    phy-mode = "rgmii";
263*43915b2fSLinus Walleij                    reg = <0>;
264*43915b2fSLinus Walleij
265*43915b2fSLinus Walleij                    fixed-link {
266*43915b2fSLinus Walleij                        full-duplex;
267*43915b2fSLinus Walleij                        pause;
268*43915b2fSLinus Walleij                        speed = <1000>;
269*43915b2fSLinus Walleij                    };
270*43915b2fSLinus Walleij                };
271*43915b2fSLinus Walleij
272*43915b2fSLinus Walleij                ethernet-port@1 {
273*43915b2fSLinus Walleij                    label = "lan1";
274*43915b2fSLinus Walleij                    phy-handle = <&switch0phy1>;
275*43915b2fSLinus Walleij                    reg = <1>;
276*43915b2fSLinus Walleij                };
277*43915b2fSLinus Walleij
278*43915b2fSLinus Walleij                ethernet-port@2 {
279*43915b2fSLinus Walleij                    label = "lan2";
280*43915b2fSLinus Walleij                    phy-handle = <&switch0phy2>;
281*43915b2fSLinus Walleij                    reg = <2>;
282*43915b2fSLinus Walleij                };
283*43915b2fSLinus Walleij
284*43915b2fSLinus Walleij                ethernet-port@3 {
285*43915b2fSLinus Walleij                    label = "lan3";
286*43915b2fSLinus Walleij                    phy-handle = <&switch0phy3>;
287*43915b2fSLinus Walleij                    reg = <3>;
288*43915b2fSLinus Walleij                };
289*43915b2fSLinus Walleij
290*43915b2fSLinus Walleij                ethernet-port@4 {
291*43915b2fSLinus Walleij                    label = "lan4";
292*43915b2fSLinus Walleij                    phy-handle = <&switch0phy4>;
293*43915b2fSLinus Walleij                    reg = <4>;
294*43915b2fSLinus Walleij                };
295*43915b2fSLinus Walleij
296*43915b2fSLinus Walleij                ethernet-port@5 {
297*43915b2fSLinus Walleij                    label = "lan5";
298*43915b2fSLinus Walleij                    phy-handle = <&switch0phy5>;
299*43915b2fSLinus Walleij                    reg = <5>;
300*43915b2fSLinus Walleij                };
301*43915b2fSLinus Walleij
302*43915b2fSLinus Walleij                ethernet-port@6 {
303*43915b2fSLinus Walleij                    label = "lan6";
304*43915b2fSLinus Walleij                    phy-handle = <&switch0phy6>;
305*43915b2fSLinus Walleij                    reg = <6>;
306*43915b2fSLinus Walleij                };
307*43915b2fSLinus Walleij
308*43915b2fSLinus Walleij                ethernet-port@7 {
309*43915b2fSLinus Walleij                    label = "lan7";
310*43915b2fSLinus Walleij                    phy-handle = <&switch0phy7>;
311*43915b2fSLinus Walleij                    reg = <7>;
312*43915b2fSLinus Walleij                };
313*43915b2fSLinus Walleij
314*43915b2fSLinus Walleij                ethernet-port@8 {
315*43915b2fSLinus Walleij                    label = "lan8";
316*43915b2fSLinus Walleij                    phy-handle = <&switch0phy8>;
317*43915b2fSLinus Walleij                    reg = <8>;
318*43915b2fSLinus Walleij                };
319*43915b2fSLinus Walleij
320*43915b2fSLinus Walleij                ethernet-port@9 {
321*43915b2fSLinus Walleij                    /* 88X3310P external phy */
322*43915b2fSLinus Walleij                    label = "lan9";
323*43915b2fSLinus Walleij                    phy-handle = <&phy1>;
324*43915b2fSLinus Walleij                    phy-mode = "xaui";
325*43915b2fSLinus Walleij                    reg = <9>;
326*43915b2fSLinus Walleij                };
327*43915b2fSLinus Walleij
328*43915b2fSLinus Walleij                ethernet-port@a {
329*43915b2fSLinus Walleij                    /* 88X3310P external phy */
330*43915b2fSLinus Walleij                    label = "lan10";
331*43915b2fSLinus Walleij                    phy-handle = <&phy2>;
332*43915b2fSLinus Walleij                    phy-mode = "xaui";
333*43915b2fSLinus Walleij                    reg = <0xa>;
334*43915b2fSLinus Walleij                };
335*43915b2fSLinus Walleij            };
336*43915b2fSLinus Walleij        };
337*43915b2fSLinus Walleij    };
338