xref: /linux/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml (revision 06d07429858317ded2db7986113a9e0129cd599b)
1*017ca9c9SLinus Walleij# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*017ca9c9SLinus Walleij%YAML 1.2
3*017ca9c9SLinus Walleij---
4*017ca9c9SLinus Walleij$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6060.yaml#
5*017ca9c9SLinus Walleij$schema: http://devicetree.org/meta-schemas/core.yaml#
6*017ca9c9SLinus Walleij
7*017ca9c9SLinus Walleijtitle: Marvell MV88E6060 DSA switch
8*017ca9c9SLinus Walleij
9*017ca9c9SLinus Walleijmaintainers:
10*017ca9c9SLinus Walleij  - Andrew Lunn <andrew@lunn.ch>
11*017ca9c9SLinus Walleij
12*017ca9c9SLinus Walleijdescription:
13*017ca9c9SLinus Walleij  The Marvell MV88E6060 switch has been produced and sold by Marvell
14*017ca9c9SLinus Walleij  since at least 2008. The switch has one pin ADDR4 that controls the
15*017ca9c9SLinus Walleij  MDIO address of the switch to be 0x10 or 0x00, and on the MDIO bus
16*017ca9c9SLinus Walleij  connected to the switch, the PHYs inside the switch appear as
17*017ca9c9SLinus Walleij  independent devices on address 0x00-0x04 or 0x10-0x14, so in difference
18*017ca9c9SLinus Walleij  from many other DSA switches this switch does not have an internal
19*017ca9c9SLinus Walleij  MDIO bus for the PHY devices.
20*017ca9c9SLinus Walleij
21*017ca9c9SLinus Walleijproperties:
22*017ca9c9SLinus Walleij  compatible:
23*017ca9c9SLinus Walleij    const: marvell,mv88e6060
24*017ca9c9SLinus Walleij    description:
25*017ca9c9SLinus Walleij      The MV88E6060 is the oldest Marvell DSA switch product, and
26*017ca9c9SLinus Walleij      as such a bit limited in features compared to later hardware.
27*017ca9c9SLinus Walleij
28*017ca9c9SLinus Walleij  reg:
29*017ca9c9SLinus Walleij    maxItems: 1
30*017ca9c9SLinus Walleij
31*017ca9c9SLinus Walleij  reset-gpios:
32*017ca9c9SLinus Walleij    description:
33*017ca9c9SLinus Walleij      GPIO to be used to reset the whole device
34*017ca9c9SLinus Walleij    maxItems: 1
35*017ca9c9SLinus Walleij
36*017ca9c9SLinus WalleijallOf:
37*017ca9c9SLinus Walleij  - $ref: dsa.yaml#/$defs/ethernet-ports
38*017ca9c9SLinus Walleij
39*017ca9c9SLinus Walleijrequired:
40*017ca9c9SLinus Walleij  - compatible
41*017ca9c9SLinus Walleij  - reg
42*017ca9c9SLinus Walleij
43*017ca9c9SLinus WalleijunevaluatedProperties: false
44*017ca9c9SLinus Walleij
45*017ca9c9SLinus Walleijexamples:
46*017ca9c9SLinus Walleij  - |
47*017ca9c9SLinus Walleij    #include <dt-bindings/gpio/gpio.h>
48*017ca9c9SLinus Walleij    #include <dt-bindings/interrupt-controller/irq.h>
49*017ca9c9SLinus Walleij    mdio {
50*017ca9c9SLinus Walleij        #address-cells = <1>;
51*017ca9c9SLinus Walleij        #size-cells = <0>;
52*017ca9c9SLinus Walleij
53*017ca9c9SLinus Walleij        ethernet-switch@16 {
54*017ca9c9SLinus Walleij            compatible = "marvell,mv88e6060";
55*017ca9c9SLinus Walleij            reg = <16>;
56*017ca9c9SLinus Walleij
57*017ca9c9SLinus Walleij            ethernet-ports {
58*017ca9c9SLinus Walleij                #address-cells = <1>;
59*017ca9c9SLinus Walleij                #size-cells = <0>;
60*017ca9c9SLinus Walleij
61*017ca9c9SLinus Walleij                ethernet-port@0 {
62*017ca9c9SLinus Walleij                    reg = <0>;
63*017ca9c9SLinus Walleij                    label = "lan1";
64*017ca9c9SLinus Walleij                };
65*017ca9c9SLinus Walleij                ethernet-port@1 {
66*017ca9c9SLinus Walleij                    reg = <1>;
67*017ca9c9SLinus Walleij                    label = "lan2";
68*017ca9c9SLinus Walleij                };
69*017ca9c9SLinus Walleij                ethernet-port@2 {
70*017ca9c9SLinus Walleij                    reg = <2>;
71*017ca9c9SLinus Walleij                    label = "lan3";
72*017ca9c9SLinus Walleij                };
73*017ca9c9SLinus Walleij                ethernet-port@3 {
74*017ca9c9SLinus Walleij                    reg = <3>;
75*017ca9c9SLinus Walleij                    label = "lan4";
76*017ca9c9SLinus Walleij                };
77*017ca9c9SLinus Walleij                ethernet-port@5 {
78*017ca9c9SLinus Walleij                    reg = <5>;
79*017ca9c9SLinus Walleij                    phy-mode = "rev-mii";
80*017ca9c9SLinus Walleij                    ethernet = <&ethc>;
81*017ca9c9SLinus Walleij                    fixed-link {
82*017ca9c9SLinus Walleij                        speed = <100>;
83*017ca9c9SLinus Walleij                        full-duplex;
84*017ca9c9SLinus Walleij                    };
85*017ca9c9SLinus Walleij                };
86*017ca9c9SLinus Walleij            };
87*017ca9c9SLinus Walleij        };
88*017ca9c9SLinus Walleij    };
89