1*c7f75954SMartin Schiller# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*c7f75954SMartin Schiller%YAML 1.2 3*c7f75954SMartin Schiller--- 4*c7f75954SMartin Schiller$id: http://devicetree.org/schemas/net/dsa/lantiq,gswip.yaml# 5*c7f75954SMartin Schiller$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c7f75954SMartin Schiller 7*c7f75954SMartin Schillertitle: Lantiq GSWIP Ethernet switches 8*c7f75954SMartin Schiller 9*c7f75954SMartin SchillerallOf: 10*c7f75954SMartin Schiller - $ref: dsa.yaml#/$defs/ethernet-ports 11*c7f75954SMartin Schiller 12*c7f75954SMartin Schillermaintainers: 13*c7f75954SMartin Schiller - Hauke Mehrtens <hauke@hauke-m.de> 14*c7f75954SMartin Schiller 15*c7f75954SMartin Schillerproperties: 16*c7f75954SMartin Schiller compatible: 17*c7f75954SMartin Schiller enum: 18*c7f75954SMartin Schiller - lantiq,xrx200-gswip 19*c7f75954SMartin Schiller - lantiq,xrx300-gswip 20*c7f75954SMartin Schiller - lantiq,xrx330-gswip 21*c7f75954SMartin Schiller 22*c7f75954SMartin Schiller reg: 23*c7f75954SMartin Schiller minItems: 3 24*c7f75954SMartin Schiller maxItems: 3 25*c7f75954SMartin Schiller 26*c7f75954SMartin Schiller reg-names: 27*c7f75954SMartin Schiller items: 28*c7f75954SMartin Schiller - const: switch 29*c7f75954SMartin Schiller - const: mdio 30*c7f75954SMartin Schiller - const: mii 31*c7f75954SMartin Schiller 32*c7f75954SMartin Schiller mdio: 33*c7f75954SMartin Schiller $ref: /schemas/net/mdio.yaml# 34*c7f75954SMartin Schiller unevaluatedProperties: false 35*c7f75954SMartin Schiller 36*c7f75954SMartin Schiller properties: 37*c7f75954SMartin Schiller compatible: 38*c7f75954SMartin Schiller const: lantiq,xrx200-mdio 39*c7f75954SMartin Schiller 40*c7f75954SMartin Schiller required: 41*c7f75954SMartin Schiller - compatible 42*c7f75954SMartin Schiller 43*c7f75954SMartin Schiller gphy-fw: 44*c7f75954SMartin Schiller type: object 45*c7f75954SMartin Schiller properties: 46*c7f75954SMartin Schiller '#address-cells': 47*c7f75954SMartin Schiller const: 1 48*c7f75954SMartin Schiller 49*c7f75954SMartin Schiller '#size-cells': 50*c7f75954SMartin Schiller const: 0 51*c7f75954SMartin Schiller 52*c7f75954SMartin Schiller compatible: 53*c7f75954SMartin Schiller items: 54*c7f75954SMartin Schiller - enum: 55*c7f75954SMartin Schiller - lantiq,xrx200-gphy-fw 56*c7f75954SMartin Schiller - lantiq,xrx300-gphy-fw 57*c7f75954SMartin Schiller - lantiq,xrx330-gphy-fw 58*c7f75954SMartin Schiller - const: lantiq,gphy-fw 59*c7f75954SMartin Schiller 60*c7f75954SMartin Schiller lantiq,rcu: 61*c7f75954SMartin Schiller $ref: /schemas/types.yaml#/definitions/phandle 62*c7f75954SMartin Schiller description: phandle to the RCU syscon 63*c7f75954SMartin Schiller 64*c7f75954SMartin Schiller patternProperties: 65*c7f75954SMartin Schiller "^gphy@[0-9a-f]{1,2}$": 66*c7f75954SMartin Schiller type: object 67*c7f75954SMartin Schiller 68*c7f75954SMartin Schiller additionalProperties: false 69*c7f75954SMartin Schiller 70*c7f75954SMartin Schiller properties: 71*c7f75954SMartin Schiller reg: 72*c7f75954SMartin Schiller minimum: 0 73*c7f75954SMartin Schiller maximum: 255 74*c7f75954SMartin Schiller description: 75*c7f75954SMartin Schiller Offset of the GPHY firmware register in the RCU register range 76*c7f75954SMartin Schiller 77*c7f75954SMartin Schiller resets: 78*c7f75954SMartin Schiller items: 79*c7f75954SMartin Schiller - description: GPHY reset line 80*c7f75954SMartin Schiller 81*c7f75954SMartin Schiller reset-names: 82*c7f75954SMartin Schiller items: 83*c7f75954SMartin Schiller - const: gphy 84*c7f75954SMartin Schiller 85*c7f75954SMartin Schiller required: 86*c7f75954SMartin Schiller - reg 87*c7f75954SMartin Schiller 88*c7f75954SMartin Schiller required: 89*c7f75954SMartin Schiller - compatible 90*c7f75954SMartin Schiller - lantiq,rcu 91*c7f75954SMartin Schiller 92*c7f75954SMartin Schiller additionalProperties: false 93*c7f75954SMartin Schiller 94*c7f75954SMartin Schillerrequired: 95*c7f75954SMartin Schiller - compatible 96*c7f75954SMartin Schiller - reg 97*c7f75954SMartin Schiller 98*c7f75954SMartin SchillerunevaluatedProperties: false 99*c7f75954SMartin Schiller 100*c7f75954SMartin Schillerexamples: 101*c7f75954SMartin Schiller - | 102*c7f75954SMartin Schiller switch@e108000 { 103*c7f75954SMartin Schiller compatible = "lantiq,xrx200-gswip"; 104*c7f75954SMartin Schiller reg = <0xe108000 0x3100>, /* switch */ 105*c7f75954SMartin Schiller <0xe10b100 0xd8>, /* mdio */ 106*c7f75954SMartin Schiller <0xe10b1d8 0x130>; /* mii */ 107*c7f75954SMartin Schiller dsa,member = <0 0>; 108*c7f75954SMartin Schiller 109*c7f75954SMartin Schiller ports { 110*c7f75954SMartin Schiller #address-cells = <1>; 111*c7f75954SMartin Schiller #size-cells = <0>; 112*c7f75954SMartin Schiller 113*c7f75954SMartin Schiller port@0 { 114*c7f75954SMartin Schiller reg = <0>; 115*c7f75954SMartin Schiller label = "lan3"; 116*c7f75954SMartin Schiller phy-mode = "rgmii"; 117*c7f75954SMartin Schiller phy-handle = <&phy0>; 118*c7f75954SMartin Schiller }; 119*c7f75954SMartin Schiller 120*c7f75954SMartin Schiller port@1 { 121*c7f75954SMartin Schiller reg = <1>; 122*c7f75954SMartin Schiller label = "lan4"; 123*c7f75954SMartin Schiller phy-mode = "rgmii"; 124*c7f75954SMartin Schiller phy-handle = <&phy1>; 125*c7f75954SMartin Schiller }; 126*c7f75954SMartin Schiller 127*c7f75954SMartin Schiller port@2 { 128*c7f75954SMartin Schiller reg = <2>; 129*c7f75954SMartin Schiller label = "lan2"; 130*c7f75954SMartin Schiller phy-mode = "internal"; 131*c7f75954SMartin Schiller phy-handle = <&phy11>; 132*c7f75954SMartin Schiller }; 133*c7f75954SMartin Schiller 134*c7f75954SMartin Schiller port@4 { 135*c7f75954SMartin Schiller reg = <4>; 136*c7f75954SMartin Schiller label = "lan1"; 137*c7f75954SMartin Schiller phy-mode = "internal"; 138*c7f75954SMartin Schiller phy-handle = <&phy13>; 139*c7f75954SMartin Schiller }; 140*c7f75954SMartin Schiller 141*c7f75954SMartin Schiller port@5 { 142*c7f75954SMartin Schiller reg = <5>; 143*c7f75954SMartin Schiller label = "wan"; 144*c7f75954SMartin Schiller phy-mode = "rgmii"; 145*c7f75954SMartin Schiller phy-handle = <&phy5>; 146*c7f75954SMartin Schiller }; 147*c7f75954SMartin Schiller 148*c7f75954SMartin Schiller port@6 { 149*c7f75954SMartin Schiller reg = <0x6>; 150*c7f75954SMartin Schiller phy-mode = "internal"; 151*c7f75954SMartin Schiller ethernet = <ð0>; 152*c7f75954SMartin Schiller 153*c7f75954SMartin Schiller fixed-link { 154*c7f75954SMartin Schiller speed = <1000>; 155*c7f75954SMartin Schiller full-duplex; 156*c7f75954SMartin Schiller }; 157*c7f75954SMartin Schiller }; 158*c7f75954SMartin Schiller }; 159*c7f75954SMartin Schiller 160*c7f75954SMartin Schiller mdio { 161*c7f75954SMartin Schiller #address-cells = <1>; 162*c7f75954SMartin Schiller #size-cells = <0>; 163*c7f75954SMartin Schiller compatible = "lantiq,xrx200-mdio"; 164*c7f75954SMartin Schiller 165*c7f75954SMartin Schiller phy0: ethernet-phy@0 { 166*c7f75954SMartin Schiller reg = <0x0>; 167*c7f75954SMartin Schiller }; 168*c7f75954SMartin Schiller phy1: ethernet-phy@1 { 169*c7f75954SMartin Schiller reg = <0x1>; 170*c7f75954SMartin Schiller }; 171*c7f75954SMartin Schiller phy5: ethernet-phy@5 { 172*c7f75954SMartin Schiller reg = <0x5>; 173*c7f75954SMartin Schiller }; 174*c7f75954SMartin Schiller phy11: ethernet-phy@11 { 175*c7f75954SMartin Schiller reg = <0x11>; 176*c7f75954SMartin Schiller }; 177*c7f75954SMartin Schiller phy13: ethernet-phy@13 { 178*c7f75954SMartin Schiller reg = <0x13>; 179*c7f75954SMartin Schiller }; 180*c7f75954SMartin Schiller }; 181*c7f75954SMartin Schiller 182*c7f75954SMartin Schiller gphy-fw { 183*c7f75954SMartin Schiller #address-cells = <1>; 184*c7f75954SMartin Schiller #size-cells = <0>; 185*c7f75954SMartin Schiller compatible = "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw"; 186*c7f75954SMartin Schiller lantiq,rcu = <&rcu0>; 187*c7f75954SMartin Schiller 188*c7f75954SMartin Schiller gphy@20 { 189*c7f75954SMartin Schiller reg = <0x20>; 190*c7f75954SMartin Schiller 191*c7f75954SMartin Schiller resets = <&reset0 31 30>; 192*c7f75954SMartin Schiller reset-names = "gphy"; 193*c7f75954SMartin Schiller }; 194*c7f75954SMartin Schiller 195*c7f75954SMartin Schiller gphy@68 { 196*c7f75954SMartin Schiller reg = <0x68>; 197*c7f75954SMartin Schiller 198*c7f75954SMartin Schiller resets = <&reset0 29 28>; 199*c7f75954SMartin Schiller reset-names = "gphy"; 200*c7f75954SMartin Schiller }; 201*c7f75954SMartin Schiller }; 202*c7f75954SMartin Schiller }; 203