xref: /linux/Documentation/devicetree/bindings/net/cpsw.txt (revision dca3a783400a18e2bf4503b1d4a85c4d0ca1a7e4)
1TI SoC Ethernet Switch Controller Device Tree Bindings
2------------------------------------------------------
3
4Required properties:
5- compatible		: Should be "ti,cpsw"
6- reg			: physical base address and size of the cpsw
7			  registers map
8- interrupts		: property with a value describing the interrupt
9			  number
10- interrupt-parent	: The parent interrupt controller
11- cpdma_channels 	: Specifies number of channels in CPDMA
12- ale_entries		: Specifies No of entries ALE can hold
13- bd_ram_size		: Specifies internal descriptor RAM size
14- rx_descs		: Specifies number of Rx descriptors
15- mac_control		: Specifies Default MAC control register content
16			  for the specific platform
17- slaves		: Specifies number for slaves
18- cpts_active_slave	: Specifies the slave to use for time stamping
19- cpts_clock_mult	: Numerator to convert input clock ticks into nanoseconds
20- cpts_clock_shift	: Denominator to convert input clock ticks into nanoseconds
21- phy_id		: Specifies slave phy id
22- mac-address		: Specifies slave MAC address
23
24Optional properties:
25- ti,hwmods		: Must be "cpgmac0"
26- no_bd_ram		: Must be 0 or 1
27- dual_emac		: Specifies Switch to act as Dual EMAC
28- dual_emac_res_vlan	: Specifies VID to be used to segregate the ports
29
30Note: "ti,hwmods" field is used to fetch the base address and irq
31resources from TI, omap hwmod data base during device registration.
32Future plan is to migrate hwmod data base contents into device tree
33blob so that, all the required data will be used from device tree dts
34file.
35
36Examples:
37
38	mac: ethernet@4A100000 {
39		compatible = "ti,cpsw";
40		reg = <0x4A100000 0x1000>;
41		interrupts = <55 0x4>;
42		interrupt-parent = <&intc>;
43		cpdma_channels = <8>;
44		ale_entries = <1024>;
45		bd_ram_size = <0x2000>;
46		no_bd_ram = <0>;
47		rx_descs = <64>;
48		mac_control = <0x20>;
49		slaves = <2>;
50		cpts_active_slave = <0>;
51		cpts_clock_mult = <0x80000000>;
52		cpts_clock_shift = <29>;
53		cpsw_emac0: slave@0 {
54			phy_id = <&davinci_mdio>, <0>;
55			/* Filled in by U-Boot */
56			mac-address = [ 00 00 00 00 00 00 ];
57		};
58		cpsw_emac1: slave@1 {
59			phy_id = <&davinci_mdio>, <1>;
60			/* Filled in by U-Boot */
61			mac-address = [ 00 00 00 00 00 00 ];
62		};
63	};
64
65(or)
66	mac: ethernet@4A100000 {
67		compatible = "ti,cpsw";
68		ti,hwmods = "cpgmac0";
69		cpdma_channels = <8>;
70		ale_entries = <1024>;
71		bd_ram_size = <0x2000>;
72		no_bd_ram = <0>;
73		rx_descs = <64>;
74		mac_control = <0x20>;
75		slaves = <2>;
76		cpts_active_slave = <0>;
77		cpts_clock_mult = <0x80000000>;
78		cpts_clock_shift = <29>;
79		cpsw_emac0: slave@0 {
80			phy_id = <&davinci_mdio>, <0>;
81			/* Filled in by U-Boot */
82			mac-address = [ 00 00 00 00 00 00 ];
83		};
84		cpsw_emac1: slave@1 {
85			phy_id = <&davinci_mdio>, <1>;
86			/* Filled in by U-Boot */
87			mac-address = [ 00 00 00 00 00 00 ];
88		};
89	};
90