xref: /linux/Documentation/devicetree/bindings/net/cdns,macb.yaml (revision 4abe51dba69f1d72a13ba3b5d0dcc237cdd71404) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/cdns,macb.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Cadence MACB/GEM Ethernet controller
8
9maintainers:
10  - Nicolas Ferre <nicolas.ferre@microchip.com>
11  - Claudiu Beznea <claudiu.beznea@microchip.com>
12
13properties:
14  compatible:
15    oneOf:
16      - items:
17          - enum:
18              - cdns,at91rm9200-emac  # Atmel at91rm9200 SoC
19          - const: cdns,emac          # Generic
20
21      - items:
22          - enum:
23              - cdns,zynq-gem         # Xilinx Zynq-7xxx SoC
24              - cdns,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC
25          - const: cdns,gem           # Generic
26        deprecated: true
27
28      - items:
29          - enum:
30              - xlnx,versal-gem       # Xilinx Versal
31              - xlnx,zynq-gem         # Xilinx Zynq-7xxx SoC
32              - xlnx,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC
33          - const: cdns,gem           # Generic
34
35      - items:
36          - enum:
37              - cdns,at91sam9260-macb # Atmel at91sam9 SoCs
38              - cdns,sam9x60-macb     # Microchip sam9x60 SoC
39              - microchip,mpfs-macb   # Microchip PolarFire SoC
40          - const: cdns,macb          # Generic
41      - items:
42          - const: microchip,pic64gx-macb # Microchip PIC64GX SoC
43          - const: microchip,mpfs-macb    # Microchip PolarFire SoC
44          - const: cdns,macb              # Generic
45      - items:
46          - enum:
47              - atmel,sama5d3-macb    # 10/100Mbit IP on Atmel sama5d3 SoCs
48          - enum:
49              - cdns,at91sam9260-macb # Atmel at91sam9 SoCs.
50          - const: cdns,macb          # Generic
51
52      - enum:
53          - atmel,sama5d2-gem         # GEM IP (10/100) on Atmel sama5d2 SoCs
54          - atmel,sama5d29-gem        # GEM XL IP (10/100) on Atmel sama5d29 SoCs
55          - atmel,sama5d3-gem         # Gigabit IP on Atmel sama5d3 SoCs
56          - atmel,sama5d4-gem         # GEM IP (10/100) on Atmel sama5d4 SoCs
57          - cdns,emac                 # Generic
58          - cdns,gem                  # Generic
59          - cdns,macb                 # Generic
60          - cdns,np4-macb             # NP4 SoC devices
61          - microchip,sama7g5-emac    # Microchip SAMA7G5 ethernet interface
62          - microchip,sama7g5-gem     # Microchip SAMA7G5 gigabit ethernet interface
63          - mobileye,eyeq5-gem        # Mobileye EyeQ5 SoCs
64          - raspberrypi,rp1-gem       # Raspberry Pi RP1 gigabit ethernet interface
65          - sifive,fu540-c000-gem     # SiFive FU540-C000 SoC
66
67      - items:
68          - enum:
69              - microchip,sam9x7-gem     # Microchip SAM9X7 gigabit ethernet interface
70              - microchip,sama7d65-gem   # Microchip SAMA7D65 gigabit ethernet interface
71          - const: microchip,sama7g5-gem # Microchip SAMA7G5 gigabit ethernet interface
72
73  reg:
74    minItems: 1
75    items:
76      - description: Basic register set
77      - description: GEMGXL Management block registers on SiFive FU540-C000 SoC
78
79  interrupts:
80    minItems: 1
81    maxItems: 8
82    description: One interrupt per available hardware queue
83
84  clocks:
85    minItems: 1
86    maxItems: 5
87
88  clock-names:
89    minItems: 1
90    items:
91      - enum: [ ether_clk, hclk, pclk ]
92      - enum: [ hclk, pclk ]
93      - enum: [ tx_clk, tsu_clk ]
94      - enum: [ rx_clk, tsu_clk ]
95      - const: tsu_clk
96
97  local-mac-address: true
98
99  phy-mode: true
100
101  phy-handle: true
102
103  phys:
104    maxItems: 1
105
106  resets:
107    maxItems: 1
108    description:
109      Recommended with ZynqMP, specify reset control for this
110      controller instance with zynqmp-reset driver.
111
112  reset-names:
113    maxItems: 1
114
115  fixed-link: true
116
117  iommus:
118    maxItems: 1
119
120  power-domains:
121    maxItems: 1
122
123  cdns,refclk-ext:
124    type: boolean
125    description:
126      This selects if the REFCLK for RMII is provided by an external source.
127      For RGMII mode this selects if the 125MHz REF clock is provided by an external
128      source.
129
130  cdns,rx-watermark:
131    $ref: /schemas/types.yaml#/definitions/uint32
132    description:
133      When the receive partial store and forward mode is activated,
134      the receiver will only begin to forward the packet to the external
135      AHB or AXI slave when enough packet data is stored in the SRAM packet buffer.
136      rx-watermark corresponds to the number of SRAM buffer locations,
137      that need to be filled, before the forwarding process is activated.
138      Width of the SRAM is platform dependent, and can be 4, 8 or 16 bytes.
139
140  '#address-cells':
141    const: 1
142
143  '#size-cells':
144    const: 0
145
146  mdio:
147    type: object
148    description:
149      Node containing PHY children. If this node is not present, then PHYs will
150      be direct children.
151
152patternProperties:
153  "^ethernet-phy@[0-9a-f]$":
154    type: object
155    $ref: ethernet-phy.yaml#
156
157    properties:
158      reset-gpios: true
159
160      magic-packet:
161        type: boolean
162        deprecated: true
163        description:
164          Indicates that the hardware supports waking up via magic packet.
165
166    unevaluatedProperties: false
167
168required:
169  - compatible
170  - reg
171  - interrupts
172  - clocks
173  - clock-names
174  - phy-mode
175
176allOf:
177  - $ref: ethernet-controller.yaml#
178
179  - if:
180      not:
181        properties:
182          compatible:
183            contains:
184              const: sifive,fu540-c000-gem
185    then:
186      properties:
187        reg:
188          maxItems: 1
189
190  - if:
191      properties:
192        compatible:
193          contains:
194            const: mobileye,eyeq5-gem
195    then:
196      required:
197        - phys
198
199unevaluatedProperties: false
200
201examples:
202  - |
203    macb0: ethernet@fffc4000 {
204            compatible = "cdns,macb";
205            reg = <0xfffc4000 0x4000>;
206            interrupts = <21>;
207            cdns,rx-watermark = <0x44>;
208            phy-mode = "rmii";
209            local-mac-address = [3a 0e 03 04 05 06];
210            clock-names = "pclk", "hclk", "tx_clk";
211            clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
212            #address-cells = <1>;
213            #size-cells = <0>;
214
215            ethernet-phy@1 {
216                    reg = <0x1>;
217                    reset-gpios = <&pioE 6 1>;
218            };
219    };
220
221  - |
222    #include <dt-bindings/power/xlnx-zynqmp-power.h>
223    #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
224    #include <dt-bindings/phy/phy.h>
225
226    bus {
227            #address-cells = <2>;
228            #size-cells = <2>;
229            gem1: ethernet@ff0c0000 {
230                    compatible = "xlnx,zynqmp-gem", "cdns,gem";
231                    interrupt-parent = <&gic>;
232                    interrupts = <0 59 4>, <0 59 4>;
233                    reg = <0x0 0xff0c0000 0x0 0x1000>;
234                    clocks = <&zynqmp_clk 31>, <&zynqmp_clk 105>,
235                             <&zynqmp_clk 51>, <&zynqmp_clk 50>,
236                             <&zynqmp_clk 44>;
237                    clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
238                    #address-cells = <1>;
239                    #size-cells = <0>;
240                    iommus = <&smmu 0x875>;
241                    power-domains = <&zynqmp_firmware PD_ETH_1>;
242                    resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
243                    reset-names = "gem1_rst";
244                    phy-mode = "sgmii";
245                    phys = <&psgtr 1 PHY_TYPE_SGMII 1 1>;
246                    fixed-link {
247                            speed = <1000>;
248                            full-duplex;
249                            pause;
250                    };
251            };
252    };
253