1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: 8 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC). 9 10maintainers: 11 - Marc Kleine-Budde <mkl@pengutronix.de> 12 13allOf: 14 - $ref: can-controller.yaml# 15 16properties: 17 compatible: 18 oneOf: 19 - enum: 20 - fsl,imx95-flexcan 21 - fsl,imx93-flexcan 22 - fsl,imx8qm-flexcan 23 - fsl,imx8mp-flexcan 24 - fsl,imx6q-flexcan 25 - fsl,imx28-flexcan 26 - fsl,imx25-flexcan 27 - fsl,p1010-flexcan 28 - fsl,vf610-flexcan 29 - fsl,ls1021ar2-flexcan 30 - fsl,lx2160ar1-flexcan 31 - items: 32 - enum: 33 - fsl,imx53-flexcan 34 - fsl,imx35-flexcan 35 - const: fsl,imx25-flexcan 36 - items: 37 - enum: 38 - fsl,imx7d-flexcan 39 - fsl,imx6ul-flexcan 40 - fsl,imx6sx-flexcan 41 - const: fsl,imx6q-flexcan 42 - items: 43 - enum: 44 - fsl,ls1028ar1-flexcan 45 - const: fsl,lx2160ar1-flexcan 46 47 reg: 48 maxItems: 1 49 50 interrupts: 51 maxItems: 1 52 53 clocks: 54 maxItems: 2 55 56 clock-names: 57 items: 58 - const: ipg 59 - const: per 60 61 clock-frequency: 62 description: | 63 The oscillator frequency driving the flexcan device, filled in by the 64 boot loader. This property should only be used the used operating system 65 doesn't support the clocks and clock-names property. 66 67 power-domains: 68 maxItems: 1 69 70 xceiver-supply: 71 description: Regulator that powers the CAN transceiver. 72 73 big-endian: 74 $ref: /schemas/types.yaml#/definitions/flag 75 description: | 76 This means the registers of FlexCAN controller are big endian. This is 77 optional property.i.e. if this property is not present in device tree 78 node then controller is assumed to be little endian. If this property is 79 present then controller is assumed to be big endian. 80 81 can-transceiver: 82 $ref: can-transceiver.yaml# 83 unevaluatedProperties: false 84 85 fsl,stop-mode: 86 description: | 87 Register bits of stop mode control. 88 89 The format should be as follows: 90 <gpr req_gpr req_bit> 91 gpr is the phandle to general purpose register node. 92 req_gpr is the gpr register offset of CAN stop request. 93 req_bit is the bit offset of CAN stop request. 94 $ref: /schemas/types.yaml#/definitions/phandle-array 95 items: 96 - items: 97 - description: The 'gpr' is the phandle to general purpose register node. 98 - description: The 'req_gpr' is the gpr register offset of CAN stop request. 99 maximum: 0xff 100 - description: The 'req_bit' is the bit offset of CAN stop request. 101 maximum: 0x1f 102 103 fsl,clk-source: 104 description: | 105 Select the clock source to the CAN Protocol Engine (PE). It's SoC 106 implementation dependent. Refer to RM for detailed definition. If this 107 property is not set in device tree node then driver selects clock source 1 108 by default. 109 0: clock source 0 (oscillator clock) 110 1: clock source 1 (peripheral clock) 111 $ref: /schemas/types.yaml#/definitions/uint8 112 default: 1 113 minimum: 0 114 maximum: 1 115 116 wakeup-source: 117 $ref: /schemas/types.yaml#/definitions/flag 118 description: 119 Enable CAN remote wakeup. 120 121 fsl,scu-index: 122 description: | 123 The scu index of CAN instance. 124 For SoCs with SCU support, need setup stop mode via SCU firmware, so this 125 property can help indicate a resource. It supports up to 3 CAN instances 126 now. 127 $ref: /schemas/types.yaml#/definitions/uint8 128 minimum: 0 129 maximum: 2 130 131 termination-gpios: true 132 termination-ohms: true 133 134required: 135 - compatible 136 - reg 137 - interrupts 138 139additionalProperties: false 140 141examples: 142 - | 143 can@1c000 { 144 compatible = "fsl,p1010-flexcan"; 145 reg = <0x1c000 0x1000>; 146 interrupts = <48 0x2>; 147 interrupt-parent = <&mpic>; 148 clock-frequency = <200000000>; 149 fsl,clk-source = /bits/ 8 <0>; 150 }; 151 - | 152 #include <dt-bindings/interrupt-controller/irq.h> 153 154 can@2090000 { 155 compatible = "fsl,imx6q-flexcan"; 156 reg = <0x02090000 0x4000>; 157 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; 158 clocks = <&clks 1>, <&clks 2>; 159 clock-names = "ipg", "per"; 160 fsl,stop-mode = <&gpr 0x34 28>; 161 fsl,scu-index = /bits/ 8 <1>; 162 }; 163 - | 164 #include <dt-bindings/interrupt-controller/irq.h> 165 #include <dt-bindings/gpio/gpio.h> 166 167 can@2090000 { 168 compatible = "fsl,imx6q-flexcan"; 169 reg = <0x02090000 0x4000>; 170 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; 171 clocks = <&clks 1>, <&clks 2>; 172 clock-names = "ipg", "per"; 173 fsl,stop-mode = <&gpr 0x34 28>; 174 termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 175 termination-ohms = <120>; 176 }; 177