xref: /linux/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml (revision 9f2c9170934eace462499ba0bfe042cc72900173) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title:
8  Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
9
10maintainers:
11  - Marc Kleine-Budde <mkl@pengutronix.de>
12
13allOf:
14  - $ref: can-controller.yaml#
15
16properties:
17  compatible:
18    oneOf:
19      - enum:
20          - fsl,imx93-flexcan
21          - fsl,imx8qm-flexcan
22          - fsl,imx8mp-flexcan
23          - fsl,imx6q-flexcan
24          - fsl,imx28-flexcan
25          - fsl,imx25-flexcan
26          - fsl,p1010-flexcan
27          - fsl,vf610-flexcan
28          - fsl,ls1021ar2-flexcan
29          - fsl,lx2160ar1-flexcan
30      - items:
31          - enum:
32              - fsl,imx53-flexcan
33              - fsl,imx35-flexcan
34          - const: fsl,imx25-flexcan
35      - items:
36          - enum:
37              - fsl,imx7d-flexcan
38              - fsl,imx6ul-flexcan
39              - fsl,imx6sx-flexcan
40          - const: fsl,imx6q-flexcan
41      - items:
42          - enum:
43              - fsl,ls1028ar1-flexcan
44          - const: fsl,lx2160ar1-flexcan
45
46  reg:
47    maxItems: 1
48
49  interrupts:
50    maxItems: 1
51
52  clocks:
53    maxItems: 2
54
55  clock-names:
56    items:
57      - const: ipg
58      - const: per
59
60  clock-frequency:
61    description: |
62      The oscillator frequency driving the flexcan device, filled in by the
63      boot loader. This property should only be used the used operating system
64      doesn't support the clocks and clock-names property.
65
66  xceiver-supply:
67    description: Regulator that powers the CAN transceiver.
68
69  big-endian:
70    $ref: /schemas/types.yaml#/definitions/flag
71    description: |
72      This means the registers of FlexCAN controller are big endian. This is
73      optional property.i.e. if this property is not present in device tree
74      node then controller is assumed to be little endian. If this property is
75      present then controller is assumed to be big endian.
76
77  fsl,stop-mode:
78    description: |
79      Register bits of stop mode control.
80
81      The format should be as follows:
82      <gpr req_gpr req_bit>
83      gpr is the phandle to general purpose register node.
84      req_gpr is the gpr register offset of CAN stop request.
85      req_bit is the bit offset of CAN stop request.
86    $ref: /schemas/types.yaml#/definitions/phandle-array
87    items:
88      - items:
89          - description: The 'gpr' is the phandle to general purpose register node.
90          - description: The 'req_gpr' is the gpr register offset of CAN stop request.
91            maximum: 0xff
92          - description: The 'req_bit' is the bit offset of CAN stop request.
93            maximum: 0x1f
94
95  fsl,clk-source:
96    description: |
97      Select the clock source to the CAN Protocol Engine (PE). It's SoC
98      implementation dependent. Refer to RM for detailed definition. If this
99      property is not set in device tree node then driver selects clock source 1
100      by default.
101      0: clock source 0 (oscillator clock)
102      1: clock source 1 (peripheral clock)
103    $ref: /schemas/types.yaml#/definitions/uint8
104    default: 1
105    minimum: 0
106    maximum: 1
107
108  wakeup-source:
109    $ref: /schemas/types.yaml#/definitions/flag
110    description:
111      Enable CAN remote wakeup.
112
113  fsl,scu-index:
114    description: |
115      The scu index of CAN instance.
116      For SoCs with SCU support, need setup stop mode via SCU firmware, so this
117      property can help indicate a resource. It supports up to 3 CAN instances
118      now.
119    $ref: /schemas/types.yaml#/definitions/uint8
120    minimum: 0
121    maximum: 2
122
123  termination-gpios: true
124  termination-ohms: true
125
126required:
127  - compatible
128  - reg
129  - interrupts
130
131additionalProperties: false
132
133examples:
134  - |
135    can@1c000 {
136        compatible = "fsl,p1010-flexcan";
137        reg = <0x1c000 0x1000>;
138        interrupts = <48 0x2>;
139        interrupt-parent = <&mpic>;
140        clock-frequency = <200000000>;
141        fsl,clk-source = /bits/ 8 <0>;
142    };
143  - |
144    #include <dt-bindings/interrupt-controller/irq.h>
145
146    can@2090000 {
147        compatible = "fsl,imx6q-flexcan";
148        reg = <0x02090000 0x4000>;
149        interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
150        clocks = <&clks 1>, <&clks 2>;
151        clock-names = "ipg", "per";
152        fsl,stop-mode = <&gpr 0x34 28>;
153        fsl,scu-index = /bits/ 8 <1>;
154    };
155  - |
156    #include <dt-bindings/interrupt-controller/irq.h>
157    #include <dt-bindings/gpio/gpio.h>
158
159    can@2090000 {
160        compatible = "fsl,imx6q-flexcan";
161        reg = <0x02090000 0x4000>;
162        interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
163        clocks = <&clks 1>, <&clks 2>;
164        clock-names = "ipg", "per";
165        fsl,stop-mode = <&gpr 0x34 28>;
166        termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
167        termination-ohms = <120>;
168    };
169