1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: 8 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC). 9 10maintainers: 11 - Marc Kleine-Budde <mkl@pengutronix.de> 12 13allOf: 14 - $ref: can-controller.yaml# 15 16properties: 17 compatible: 18 oneOf: 19 - enum: 20 - fsl,imx93-flexcan 21 - fsl,imx8qm-flexcan 22 - fsl,imx8mp-flexcan 23 - fsl,imx6q-flexcan 24 - fsl,imx28-flexcan 25 - fsl,imx25-flexcan 26 - fsl,p1010-flexcan 27 - fsl,vf610-flexcan 28 - fsl,ls1021ar2-flexcan 29 - fsl,lx2160ar1-flexcan 30 - items: 31 - enum: 32 - fsl,imx53-flexcan 33 - fsl,imx35-flexcan 34 - const: fsl,imx25-flexcan 35 - items: 36 - enum: 37 - fsl,imx7d-flexcan 38 - fsl,imx6ul-flexcan 39 - fsl,imx6sx-flexcan 40 - const: fsl,imx6q-flexcan 41 - items: 42 - const: fsl,imx95-flexcan 43 - const: fsl,imx93-flexcan 44 - items: 45 - enum: 46 - fsl,ls1028ar1-flexcan 47 - const: fsl,lx2160ar1-flexcan 48 49 reg: 50 maxItems: 1 51 52 interrupts: 53 maxItems: 1 54 55 clocks: 56 maxItems: 2 57 58 clock-names: 59 items: 60 - const: ipg 61 - const: per 62 63 clock-frequency: 64 description: | 65 The oscillator frequency driving the flexcan device, filled in by the 66 boot loader. This property should only be used the used operating system 67 doesn't support the clocks and clock-names property. 68 69 power-domains: 70 maxItems: 1 71 72 xceiver-supply: 73 description: Regulator that powers the CAN transceiver. 74 75 big-endian: 76 $ref: /schemas/types.yaml#/definitions/flag 77 description: | 78 This means the registers of FlexCAN controller are big endian. This is 79 optional property.i.e. if this property is not present in device tree 80 node then controller is assumed to be little endian. If this property is 81 present then controller is assumed to be big endian. 82 83 fsl,stop-mode: 84 description: | 85 Register bits of stop mode control. 86 87 The format should be as follows: 88 <gpr req_gpr req_bit> 89 gpr is the phandle to general purpose register node. 90 req_gpr is the gpr register offset of CAN stop request. 91 req_bit is the bit offset of CAN stop request. 92 $ref: /schemas/types.yaml#/definitions/phandle-array 93 items: 94 - items: 95 - description: The 'gpr' is the phandle to general purpose register node. 96 - description: The 'req_gpr' is the gpr register offset of CAN stop request. 97 maximum: 0xff 98 - description: The 'req_bit' is the bit offset of CAN stop request. 99 maximum: 0x1f 100 101 fsl,clk-source: 102 description: | 103 Select the clock source to the CAN Protocol Engine (PE). It's SoC 104 implementation dependent. Refer to RM for detailed definition. If this 105 property is not set in device tree node then driver selects clock source 1 106 by default. 107 0: clock source 0 (oscillator clock) 108 1: clock source 1 (peripheral clock) 109 $ref: /schemas/types.yaml#/definitions/uint8 110 default: 1 111 minimum: 0 112 maximum: 1 113 114 wakeup-source: 115 $ref: /schemas/types.yaml#/definitions/flag 116 description: 117 Enable CAN remote wakeup. 118 119 fsl,scu-index: 120 description: | 121 The scu index of CAN instance. 122 For SoCs with SCU support, need setup stop mode via SCU firmware, so this 123 property can help indicate a resource. It supports up to 3 CAN instances 124 now. 125 $ref: /schemas/types.yaml#/definitions/uint8 126 minimum: 0 127 maximum: 2 128 129 termination-gpios: true 130 termination-ohms: true 131 132required: 133 - compatible 134 - reg 135 - interrupts 136 137additionalProperties: false 138 139examples: 140 - | 141 can@1c000 { 142 compatible = "fsl,p1010-flexcan"; 143 reg = <0x1c000 0x1000>; 144 interrupts = <48 0x2>; 145 interrupt-parent = <&mpic>; 146 clock-frequency = <200000000>; 147 fsl,clk-source = /bits/ 8 <0>; 148 }; 149 - | 150 #include <dt-bindings/interrupt-controller/irq.h> 151 152 can@2090000 { 153 compatible = "fsl,imx6q-flexcan"; 154 reg = <0x02090000 0x4000>; 155 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; 156 clocks = <&clks 1>, <&clks 2>; 157 clock-names = "ipg", "per"; 158 fsl,stop-mode = <&gpr 0x34 28>; 159 fsl,scu-index = /bits/ 8 <1>; 160 }; 161 - | 162 #include <dt-bindings/interrupt-controller/irq.h> 163 #include <dt-bindings/gpio/gpio.h> 164 165 can@2090000 { 166 compatible = "fsl,imx6q-flexcan"; 167 reg = <0x02090000 0x4000>; 168 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; 169 clocks = <&clks 1>, <&clks 2>; 170 clock-names = "ipg", "per"; 171 fsl,stop-mode = <&gpr 0x34 28>; 172 termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 173 termination-ohms = <120>; 174 }; 175