xref: /linux/Documentation/devicetree/bindings/net/amlogic,gxl-mdio-mux.yaml (revision 72bea132f3680ee51e7ed2cee62892b6f5121909) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/amlogic,gxl-mdio-mux.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Amlogic GXL MDIO bus multiplexer
8
9maintainers:
10  - Jerome Brunet <jbrunet@baylibre.com>
11
12description:
13  This is a special case of a MDIO bus multiplexer. It allows to choose between
14  the internal mdio bus leading to the embedded 10/100 PHY or the external
15  MDIO bus on the Amlogic GXL SoC family.
16
17allOf:
18  - $ref: mdio-mux.yaml#
19
20properties:
21  compatible:
22    const: amlogic,gxl-mdio-mux
23
24  reg:
25    maxItems: 1
26
27  clocks:
28    maxItems: 1
29
30  clock-names:
31    items:
32      - const: ref
33
34required:
35  - compatible
36  - reg
37  - clocks
38  - clock-names
39
40unevaluatedProperties: false
41
42examples:
43  - |
44    eth_phy_mux: mdio@558 {
45      compatible = "amlogic,gxl-mdio-mux";
46      reg = <0x558 0xc>;
47      #address-cells = <1>;
48      #size-cells = <0>;
49      clocks = <&refclk>;
50      clock-names = "ref";
51      mdio-parent-bus = <&mdio0>;
52
53      external_mdio: mdio@0 {
54        reg = <0x0>;
55        #address-cells = <1>;
56        #size-cells = <0>;
57      };
58
59      internal_mdio: mdio@1 {
60        reg = <0x1>;
61        #address-cells = <1>;
62        #size-cells = <0>;
63      };
64    };
65