xref: /linux/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml (revision 08b7174fb8d126e607e385e34b9e1da4f3be274f) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A83t EMAC
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  compatible:
15    oneOf:
16      - const: allwinner,sun8i-a83t-emac
17      - const: allwinner,sun8i-h3-emac
18      - const: allwinner,sun8i-r40-gmac
19      - const: allwinner,sun8i-v3s-emac
20      - const: allwinner,sun50i-a64-emac
21      - items:
22          - enum:
23              - allwinner,sun20i-d1-emac
24              - allwinner,sun50i-h6-emac
25              - allwinner,sun50i-h616-emac0
26          - const: allwinner,sun50i-a64-emac
27
28  reg:
29    maxItems: 1
30
31  interrupts:
32    maxItems: 1
33
34  interrupt-names:
35    const: macirq
36
37  clocks:
38    maxItems: 1
39
40  clock-names:
41    const: stmmaceth
42
43  phy-supply:
44    description: PHY regulator
45
46  syscon:
47    $ref: /schemas/types.yaml#/definitions/phandle
48    description:
49      Phandle to the device containing the EMAC or GMAC clock
50      register
51
52required:
53  - compatible
54  - reg
55  - interrupts
56  - interrupt-names
57  - clocks
58  - clock-names
59  - resets
60  - reset-names
61  - phy-handle
62  - phy-mode
63  - syscon
64
65allOf:
66  - $ref: snps,dwmac.yaml#
67  - if:
68      properties:
69        compatible:
70          contains:
71            enum:
72              - allwinner,sun8i-a83t-emac
73              - allwinner,sun8i-h3-emac
74              - allwinner,sun8i-v3s-emac
75              - allwinner,sun50i-a64-emac
76
77    then:
78      properties:
79        allwinner,tx-delay-ps:
80          default: 0
81          minimum: 0
82          maximum: 700
83          multipleOf: 100
84          description:
85            External RGMII PHY TX clock delay chain value in ps.
86
87        allwinner,rx-delay-ps:
88          default: 0
89          minimum: 0
90          maximum: 3100
91          multipleOf: 100
92          description:
93            External RGMII PHY TX clock delay chain value in ps.
94
95  - if:
96      properties:
97        compatible:
98          contains:
99            enum:
100              - allwinner,sun8i-r40-gmac
101
102    then:
103      properties:
104        allwinner,rx-delay-ps:
105          default: 0
106          minimum: 0
107          maximum: 700
108          multipleOf: 100
109          description:
110            External RGMII PHY TX clock delay chain value in ps.
111
112  - if:
113      properties:
114        compatible:
115          contains:
116            enum:
117              - allwinner,sun8i-h3-emac
118              - allwinner,sun8i-v3s-emac
119
120    then:
121      properties:
122        allwinner,leds-active-low:
123          $ref: /schemas/types.yaml#/definitions/flag
124          description:
125            EPHY LEDs are active low.
126
127        mdio-mux:
128          type: object
129          unevaluatedProperties: false
130
131          properties:
132            compatible:
133              const: allwinner,sun8i-h3-mdio-mux
134
135            mdio-parent-bus:
136              $ref: /schemas/types.yaml#/definitions/phandle
137              description:
138                Phandle to EMAC MDIO.
139
140            "#address-cells":
141              const: 1
142
143            "#size-cells":
144              const: 0
145
146            mdio@1:
147              $ref: mdio.yaml#
148              unevaluatedProperties: false
149              description: Internal MDIO Bus
150
151              properties:
152                compatible:
153                  const: allwinner,sun8i-h3-mdio-internal
154
155                reg:
156                  const: 1
157
158              patternProperties:
159                "^ethernet-phy@[0-9a-f]$":
160                  type: object
161                  description:
162                    Integrated PHY node
163
164                  properties:
165                    clocks:
166                      maxItems: 1
167
168                    resets:
169                      maxItems: 1
170
171                  required:
172                    - clocks
173                    - resets
174
175
176            mdio@2:
177              $ref: mdio.yaml#
178              unevaluatedProperties: false
179              description: External MDIO Bus (H3 only)
180
181              properties:
182                reg:
183                  const: 2
184
185          required:
186            - compatible
187            - mdio-parent-bus
188            - mdio@1
189
190unevaluatedProperties: false
191
192examples:
193  - |
194    ethernet@1c0b000 {
195        compatible = "allwinner,sun8i-h3-emac";
196        syscon = <&syscon>;
197        reg = <0x01c0b000 0x104>;
198        interrupts = <0 82 1>;
199        interrupt-names = "macirq";
200        resets = <&ccu 12>;
201        reset-names = "stmmaceth";
202        clocks = <&ccu 27>;
203        clock-names = "stmmaceth";
204
205        phy-handle = <&int_mii_phy>;
206        phy-mode = "mii";
207        allwinner,leds-active-low;
208
209        mdio1: mdio {
210            #address-cells = <1>;
211            #size-cells = <0>;
212            compatible = "snps,dwmac-mdio";
213        };
214
215        mdio-mux {
216            compatible = "allwinner,sun8i-h3-mdio-mux";
217            #address-cells = <1>;
218            #size-cells = <0>;
219
220            mdio-parent-bus = <&mdio1>;
221
222            int_mii_phy: mdio@1 {
223                compatible = "allwinner,sun8i-h3-mdio-internal";
224                reg = <1>;
225                #address-cells = <1>;
226                #size-cells = <0>;
227
228                ethernet-phy@1 {
229                    reg = <1>;
230                    clocks = <&ccu 67>;
231                    resets = <&ccu 39>;
232                    phy-is-integrated;
233                };
234            };
235
236            mdio@2 {
237                reg = <2>;
238                #address-cells = <1>;
239                #size-cells = <0>;
240            };
241        };
242    };
243
244  - |
245    ethernet@1c0b000 {
246        compatible = "allwinner,sun8i-h3-emac";
247        syscon = <&syscon>;
248        reg = <0x01c0b000 0x104>;
249        interrupts = <0 82 1>;
250        interrupt-names = "macirq";
251        resets = <&ccu 12>;
252        reset-names = "stmmaceth";
253        clocks = <&ccu 27>;
254        clock-names = "stmmaceth";
255
256        phy-handle = <&ext_rgmii_phy>;
257        phy-mode = "rgmii";
258        allwinner,leds-active-low;
259
260        mdio2: mdio {
261            #address-cells = <1>;
262            #size-cells = <0>;
263            compatible = "snps,dwmac-mdio";
264        };
265
266        mdio-mux {
267            compatible = "allwinner,sun8i-h3-mdio-mux";
268            #address-cells = <1>;
269            #size-cells = <0>;
270            mdio-parent-bus = <&mdio2>;
271
272            mdio@1 {
273                compatible = "allwinner,sun8i-h3-mdio-internal";
274                reg = <1>;
275                #address-cells = <1>;
276                #size-cells = <0>;
277
278                ethernet-phy@1 {
279                    reg = <1>;
280                    clocks = <&ccu 67>;
281                    resets = <&ccu 39>;
282                };
283            };
284
285            mdio@2 {
286                reg = <2>;
287                #address-cells = <1>;
288                #size-cells = <0>;
289
290                ext_rgmii_phy: ethernet-phy@1 {
291                    reg = <1>;
292                };
293            };
294        };
295    };
296
297  - |
298    ethernet@1c0b000 {
299        compatible = "allwinner,sun8i-a83t-emac";
300        syscon = <&syscon>;
301        reg = <0x01c0b000 0x104>;
302        interrupts = <0 82 1>;
303        interrupt-names = "macirq";
304        resets = <&ccu 13>;
305        reset-names = "stmmaceth";
306        clocks = <&ccu 27>;
307        clock-names = "stmmaceth";
308        phy-handle = <&ext_rgmii_phy1>;
309        phy-mode = "rgmii";
310
311        mdio {
312            compatible = "snps,dwmac-mdio";
313            #address-cells = <1>;
314            #size-cells = <0>;
315
316            ext_rgmii_phy1: ethernet-phy@1 {
317                reg = <1>;
318            };
319        };
320    };
321
322...
323