xref: /linux/Documentation/devicetree/bindings/net/adi,adin.yaml (revision a34b0e4e21d6be3c3d620aa7f9dfbf0e9550c19e) 
1# SPDX-License-Identifier: GPL-2.0+
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/adi,adin.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices ADIN1200/ADIN1300 PHY
8
9maintainers:
10  - Marcelo Schmitt <marcelo.schmitt@analog.com>
11
12description: |
13  Bindings for Analog Devices Industrial Ethernet PHYs
14
15allOf:
16  - $ref: ethernet-phy.yaml#
17
18properties:
19  adi,rx-internal-delay-ps:
20    description: |
21      RGMII RX Clock Delay used only when PHY operates in RGMII mode with
22      internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
23    enum: [ 1600, 1800, 2000, 2200, 2400 ]
24    default: 2000
25
26  adi,tx-internal-delay-ps:
27    description: |
28      RGMII TX Clock Delay used only when PHY operates in RGMII mode with
29      internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
30    enum: [ 1600, 1800, 2000, 2200, 2400 ]
31    default: 2000
32
33  adi,fifo-depth-bits:
34    description: |
35      When operating in RMII mode, this option configures the FIFO depth.
36    enum: [ 4, 8, 12, 16, 20, 24 ]
37    default: 8
38
39  adi,phy-output-clock:
40    description: |
41      Select clock output on GP_CLK pin. Two clocks are available:
42      A 25MHz reference and a free-running 125MHz.
43      The phy can alternatively automatically switch between the reference and
44      the 125MHz clocks based on its internal state.
45    $ref: /schemas/types.yaml#/definitions/string
46    enum:
47      - 25mhz-reference
48      - 125mhz-free-running
49      - adaptive-free-running
50
51  adi,phy-output-reference-clock:
52    description: Enable 25MHz reference clock output on CLK25_REF pin.
53    type: boolean
54
55  adi,low-cmode-impedance:
56    description: |
57      Configure PHY for the lowest common-mode impedance on the receive pair
58      for 100BASE-TX. This is suited for capacitive coupled applications and
59      other applications where there may be a path for high common-mode noise
60      to reach the PHY.
61      If not present, by default the PHY is configured for normal termination
62      (zero-power termination) mode.
63
64      Note: There is a trade-off of 12 mW increased power consumption with
65        the lowest common-mode impedance setting, but in all cases the
66        differential impedance is 100 ohms.
67    type: boolean
68
69unevaluatedProperties: false
70
71examples:
72  - |
73    ethernet {
74        #address-cells = <1>;
75        #size-cells = <0>;
76
77        phy-mode = "rgmii-id";
78
79        ethernet-phy@0 {
80            reg = <0>;
81
82            adi,rx-internal-delay-ps = <1800>;
83            adi,tx-internal-delay-ps = <2200>;
84        };
85    };
86  - |
87    ethernet {
88        #address-cells = <1>;
89        #size-cells = <0>;
90
91        phy-mode = "rmii";
92
93        ethernet-phy@1 {
94            reg = <1>;
95
96            adi,fifo-depth-bits = <16>;
97        };
98    };
99