xref: /linux/Documentation/devicetree/bindings/mux/gpio-mux.yaml (revision 9f2c9170934eace462499ba0bfe042cc72900173) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mux/gpio-mux.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: GPIO-based multiplexer controller
8
9maintainers:
10  - Peter Rosin <peda@axentia.se>
11
12description: |+
13  Define what GPIO pins are used to control a multiplexer. Or several
14  multiplexers, if the same pins control more than one multiplexer.
15
16  The multiplexer state is defined as the number represented by the
17  multiplexer GPIO pins, where the first pin is the least significant
18  bit. An active pin is a binary 1, an inactive pin is a binary 0.
19
20properties:
21  compatible:
22    const: gpio-mux
23
24  mux-gpios:
25    description:
26      List of gpios used to control the multiplexer, least significant bit first.
27
28  '#mux-control-cells':
29    enum: [ 0, 1 ]
30
31  '#mux-state-cells':
32    enum: [ 1, 2 ]
33
34  idle-state:
35    default: -1
36
37required:
38  - compatible
39  - mux-gpios
40anyOf:
41  - required:
42      - "#mux-control-cells"
43  - required:
44      - "#mux-state-cells"
45
46additionalProperties: false
47
48examples:
49  - |
50    #include <dt-bindings/gpio/gpio.h>
51
52    mux: mux-controller {
53        compatible = "gpio-mux";
54        #mux-control-cells = <0>;
55
56        mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
57              <&pioA 1 GPIO_ACTIVE_HIGH>;
58    };
59
60    adc-mux {
61        compatible = "io-channel-mux";
62        io-channels = <&adc 0>;
63        io-channel-names = "parent";
64
65        mux-controls = <&mux>;
66
67        channels = "sync-1", "in", "out", "sync-2";
68    };
69
70    i2c-mux {
71        compatible = "i2c-mux";
72        i2c-parent = <&i2c1>;
73
74        mux-controls = <&mux>;
75
76        #address-cells = <1>;
77        #size-cells = <0>;
78
79        i2c@0 {
80            reg = <0>;
81            #address-cells = <1>;
82            #size-cells = <0>;
83
84            ssd1307: oled@3c {
85                reg = <0x3c>;
86            };
87        };
88
89        i2c@3 {
90            reg = <3>;
91            #address-cells = <1>;
92            #size-cells = <0>;
93
94            pca9555: pca9555@20 {
95                reg = <0x20>;
96            };
97        };
98    };
99...
100