19b358af7SRob Herring# SPDX-License-Identifier: GPL-2.0 29b358af7SRob Herring%YAML 1.2 39b358af7SRob Herring--- 49b358af7SRob Herring$id: http://devicetree.org/schemas/mux/gpio-mux.yaml# 59b358af7SRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml# 69b358af7SRob Herring 79b358af7SRob Herringtitle: GPIO-based multiplexer controller bindings 89b358af7SRob Herring 99b358af7SRob Herringmaintainers: 109b358af7SRob Herring - Peter Rosin <peda@axentia.se> 119b358af7SRob Herring 129b358af7SRob Herringdescription: |+ 139b358af7SRob Herring Define what GPIO pins are used to control a multiplexer. Or several 149b358af7SRob Herring multiplexers, if the same pins control more than one multiplexer. 159b358af7SRob Herring 169b358af7SRob Herring The multiplexer state is defined as the number represented by the 179b358af7SRob Herring multiplexer GPIO pins, where the first pin is the least significant 189b358af7SRob Herring bit. An active pin is a binary 1, an inactive pin is a binary 0. 199b358af7SRob Herring 209b358af7SRob Herringproperties: 219b358af7SRob Herring compatible: 229b358af7SRob Herring const: gpio-mux 239b358af7SRob Herring 249b358af7SRob Herring mux-gpios: 259b358af7SRob Herring description: 269b358af7SRob Herring List of gpios used to control the multiplexer, least significant bit first. 279b358af7SRob Herring 289b358af7SRob Herring '#mux-control-cells': 29*8f2cade5SAswath Govindraju enum: [ 0, 1 ] 30*8f2cade5SAswath Govindraju 31*8f2cade5SAswath Govindraju '#mux-state-cells': 32*8f2cade5SAswath Govindraju enum: [ 1, 2 ] 339b358af7SRob Herring 349b358af7SRob Herring idle-state: 359b358af7SRob Herring default: -1 369b358af7SRob Herring 379b358af7SRob Herringrequired: 389b358af7SRob Herring - compatible 399b358af7SRob Herring - mux-gpios 40*8f2cade5SAswath GovindrajuanyOf: 41*8f2cade5SAswath Govindraju - required: 429b358af7SRob Herring - "#mux-control-cells" 43*8f2cade5SAswath Govindraju - required: 44*8f2cade5SAswath Govindraju - "#mux-state-cells" 459b358af7SRob Herring 469b358af7SRob HerringadditionalProperties: false 479b358af7SRob Herring 489b358af7SRob Herringexamples: 499b358af7SRob Herring - | 509b358af7SRob Herring #include <dt-bindings/gpio/gpio.h> 519b358af7SRob Herring 529b358af7SRob Herring mux: mux-controller { 539b358af7SRob Herring compatible = "gpio-mux"; 549b358af7SRob Herring #mux-control-cells = <0>; 559b358af7SRob Herring 569b358af7SRob Herring mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>, 579b358af7SRob Herring <&pioA 1 GPIO_ACTIVE_HIGH>; 589b358af7SRob Herring }; 599b358af7SRob Herring 609b358af7SRob Herring adc-mux { 619b358af7SRob Herring compatible = "io-channel-mux"; 629b358af7SRob Herring io-channels = <&adc 0>; 639b358af7SRob Herring io-channel-names = "parent"; 649b358af7SRob Herring 659b358af7SRob Herring mux-controls = <&mux>; 669b358af7SRob Herring 679b358af7SRob Herring channels = "sync-1", "in", "out", "sync-2"; 689b358af7SRob Herring }; 699b358af7SRob Herring 709b358af7SRob Herring i2c-mux { 719b358af7SRob Herring compatible = "i2c-mux"; 729b358af7SRob Herring i2c-parent = <&i2c1>; 739b358af7SRob Herring 749b358af7SRob Herring mux-controls = <&mux>; 759b358af7SRob Herring 769b358af7SRob Herring #address-cells = <1>; 779b358af7SRob Herring #size-cells = <0>; 789b358af7SRob Herring 799b358af7SRob Herring i2c@0 { 809b358af7SRob Herring reg = <0>; 819b358af7SRob Herring #address-cells = <1>; 829b358af7SRob Herring #size-cells = <0>; 839b358af7SRob Herring 849b358af7SRob Herring ssd1307: oled@3c { 859b358af7SRob Herring reg = <0x3c>; 869b358af7SRob Herring }; 879b358af7SRob Herring }; 889b358af7SRob Herring 899b358af7SRob Herring i2c@3 { 909b358af7SRob Herring reg = <3>; 919b358af7SRob Herring #address-cells = <1>; 929b358af7SRob Herring #size-cells = <0>; 939b358af7SRob Herring 949b358af7SRob Herring pca9555: pca9555@20 { 959b358af7SRob Herring reg = <0x20>; 969b358af7SRob Herring }; 979b358af7SRob Herring }; 989b358af7SRob Herring }; 999b358af7SRob Herring... 100