xref: /linux/Documentation/devicetree/bindings/mtd/nand-controller.yaml (revision 5ea5880764cbb164afb17a62e76ca75dc371409d) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NAND Controller Common Properties
8
9maintainers:
10  - Miquel Raynal <miquel.raynal@bootlin.com>
11  - Richard Weinberger <richard@nod.at>
12
13description: |
14  The NAND controller should be represented with its own DT node, and
15  all NAND chips attached to this controller should be defined as
16  children nodes of the NAND controller. This representation should be
17  enforced even for simple controllers supporting only one chip.
18
19select: false
20
21properties:
22  $nodename:
23    pattern: "^nand-controller(@.*)?"
24
25  "#address-cells":
26    const: 1
27
28  "#size-cells":
29    const: 0
30
31  ranges: true
32
33  cs-gpios:
34    description:
35      Array of chip-select available to the controller. The first
36      entries are a 1:1 mapping of the available chip-select on the
37      NAND controller (even if they are not used). As many additional
38      chip-select as needed may follow and should be phandles of GPIO
39      lines. 'reg' entries of the NAND chip subnodes become indexes of
40      this array when this property is present.
41    minItems: 1
42    maxItems: 8
43
44patternProperties:
45  "^nand@[a-f0-9]$":
46    type: object
47    $ref: raw-nand-chip.yaml#
48
49required:
50  - "#address-cells"
51  - "#size-cells"
52
53# This is a generic file other binding inherit from and extend
54additionalProperties: true
55
56examples:
57  - |
58    nand-controller {
59      #address-cells = <1>;
60      #size-cells = <0>;
61      cs-gpios = <0>, <&gpioA 1>; /* A single native CS is available */
62
63      /* controller specific properties */
64
65      nand@0 {
66        reg = <0>; /* Native CS */
67        /* NAND chip specific properties */
68      };
69
70      nand@1 {
71        reg = <1>; /* GPIO CS */
72      };
73    };
74