1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...) 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12description: | 13 Flash chips (Memory Technology Devices) are often used for solid state 14 file systems on embedded devices. 15 16allOf: 17 - $ref: "mtd.yaml#" 18 19properties: 20 compatible: 21 oneOf: 22 - items: 23 - enum: 24 - amd,s29gl01gp 25 - amd,s29gl032a 26 - amd,s29gl256n 27 - amd,s29gl512n 28 - arm,versatile-flash 29 - arm,vexpress-flash 30 - cortina,gemini-flash 31 - cypress,hyperflash 32 - ge,imp3a-firmware-mirror 33 - ge,imp3a-paged-flash 34 - gef,ppc9a-firmware-mirror 35 - gef,ppc9a-paged-flash 36 - gef,sbc310-firmware-mirror 37 - gef,sbc310-paged-flash 38 - gef,sbc610-firmware-mirror 39 - gef,sbc610-paged-flash 40 - intel,28f128j3 41 - intel,dt28f160 42 - intel,ixp4xx-flash 43 - intel,JS28F128 44 - intel,JS28F640 45 - intel,PC28F640P30T85 46 - numonyx,js28f00a 47 - numonyx,js28f128 48 - sst,sst39vf320 49 - xlnx,xps-mch-emc-2.00.a 50 - enum: 51 - cfi-flash 52 - jedec-flash 53 - items: 54 - enum: 55 - cypress,cy7c1019dv33-10zsxi 56 - arm,vexpress-psram 57 - const: mtd-ram 58 - enum: 59 - cfi-flash 60 - jedec-flash 61 - mtd-ram 62 - mtd-rom 63 64 reg: 65 description: | 66 It's possible to (optionally) define multiple "reg" tuples so that 67 non-identical chips can be described in one node. 68 minItems: 1 69 maxItems: 8 70 71 bank-width: 72 description: Width (in bytes) of the bank. Equal to the device width times 73 the number of interleaved chips. 74 $ref: /schemas/types.yaml#/definitions/uint32 75 enum: [ 1, 2, 4 ] 76 77 device-width: 78 description: 79 Width of a single mtd chip. If omitted, assumed to be equal to 'bank-width'. 80 $ref: /schemas/types.yaml#/definitions/uint32 81 enum: [ 1, 2 ] 82 83 no-unaligned-direct-access: 84 type: boolean 85 description: | 86 Disables the default direct mapping of the flash. 87 88 On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause problems 89 with JFFS2 usage, as the local bus (LPB) doesn't support unaligned 90 accesses as implemented in the JFFS2 code via memcpy(). By defining 91 "no-unaligned-direct-access", the flash will not be exposed directly to 92 the MTD users (e.g. JFFS2) any more. 93 94 linux,mtd-name: 95 description: 96 Allows specifying the mtd name for retro capability with physmap-flash 97 drivers as boot loader pass the mtd partition via the old device name 98 physmap-flash. 99 $ref: /schemas/types.yaml#/definitions/string 100 101 use-advanced-sector-protection: 102 type: boolean 103 description: | 104 Enables support for the advanced sector protection (Spansion: PPB - 105 Persistent Protection Bits) locking. 106 107 erase-size: 108 description: The chip's physical erase block size in bytes. 109 $ref: /schemas/types.yaml#/definitions/uint32 110 111 addr-gpios: 112 description: 113 List of GPIO descriptors that will be used to address the MSBs address 114 lines. The order goes from LSB to MSB. 115 minItems: 1 116 maxItems: 8 117 118 '#address-cells': 119 const: 1 120 121 '#size-cells': 122 const: 1 123 124 big-endian: true 125 little-endian: true 126 127required: 128 - compatible 129 - reg 130 131if: 132 properties: 133 compatible: 134 contains: 135 const: cortina,gemini-flash 136then: 137 properties: 138 syscon: 139 $ref: /schemas/types.yaml#/definitions/phandle 140 description: 141 Phandle to the syscon controller 142 required: 143 - syscon 144 145# FIXME: A parent bus may define timing properties 146additionalProperties: true 147 148examples: 149 - | 150 151 flash@ff000000 { 152 compatible = "cfi-flash"; 153 reg = <0xff000000 0x01000000>; 154 bank-width = <4>; 155 device-width = <1>; 156 157 #address-cells = <1>; 158 #size-cells = <1>; 159 ranges = <0 0xff000000 0x01000000>; 160 161 fs@0 { 162 label = "fs"; 163 reg = <0 0xf80000>; 164 }; 165 firmware@f80000 { 166 label ="firmware"; 167 reg = <0xf80000 0x80000>; 168 read-only; 169 }; 170 }; 171 172 - | 173 /* An example with multiple "reg" tuples */ 174 175 flash@0 { 176 compatible = "intel,PC28F640P30T85", "cfi-flash"; 177 reg = <0x00000000 0x02000000>, 178 <0x02000000 0x02000000>; 179 bank-width = <2>; 180 181 #address-cells = <1>; 182 #size-cells = <1>; 183 ranges = <0 0 0x04000000>; 184 185 partition@0 { 186 label = "test-part1"; 187 reg = <0 0x04000000>; 188 }; 189 }; 190 191 - | 192 /* An example using SRAM */ 193 bus { 194 #address-cells = <2>; 195 #size-cells = <1>; 196 197 sram@2,0 { 198 compatible = "mtd-ram"; 199 reg = <2 0 0x00200000>; 200 bank-width = <2>; 201 }; 202 }; 203 204 - | 205 /* An example using addr-gpios */ 206 #include <dt-bindings/gpio/gpio.h> 207 208 flash@20000000 { 209 compatible = "cfi-flash"; 210 reg = <0x20000000 0x02000000>; 211 bank-width = <2>; 212 addr-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 213 214 #address-cells = <1>; 215 #size-cells = <1>; 216 ranges = <0 0x00000000 0x02000000>, 217 <1 0x02000000 0x02000000>; 218 219 partition@0 { 220 label = "test-part1"; 221 reg = <0 0x04000000>; 222 }; 223 }; 224... 225