1Hisilicon Hip04 Soc NAND controller DT binding 2 3Required properties: 4 5- compatible: Should be "hisilicon,504-nfc". 6- reg: The first contains base physical address and size of 7 NAND controller's registers. The second contains base 8 physical address and size of NAND controller's buffer. 9- interrupts: Interrupt number for nfc. 10- nand-bus-width: See nand.txt. 11- nand-ecc-mode: Support none and hw ecc mode. 12- #address-cells: Partition address, should be set 1. 13- #size-cells: Partition size, should be set 1. 14 15Optional properties: 16 17- nand-ecc-strength: Number of bits to correct per ECC step. 18- nand-ecc-step-size: Number of data bytes covered by a single ECC step. 19 20The following ECC strength and step size are currently supported: 21 22 - nand-ecc-strength = <16>, nand-ecc-step-size = <1024> 23 24Flash chip may optionally contain additional sub-nodes describing partitions of 25the address space. See partition.txt for more detail. 26 27Example: 28 29 nand: nand@4020000 { 30 compatible = "hisilicon,504-nfc"; 31 reg = <0x4020000 0x10000>, <0x5000000 0x1000>; 32 interrupts = <0 379 4>; 33 nand-bus-width = <8>; 34 nand-ecc-mode = "hw"; 35 nand-ecc-strength = <16>; 36 nand-ecc-step-size = <1024>; 37 #address-cells = <1>; 38 #size-cells = <1>; 39 40 partition@0 { 41 label = "nand_text"; 42 reg = <0x00000000 0x00400000>; 43 }; 44 45 ... 46 47 }; 48