xref: /linux/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml (revision d30c1683aaecb93d2ab95685dc4300a33d3cea7a) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/cdns,hp-nfc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Cadence NAND controller
8
9maintainers:
10  - Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
11
12allOf:
13  - $ref: nand-controller.yaml
14
15properties:
16  compatible:
17    items:
18      - const: cdns,hp-nfc
19
20  reg:
21    items:
22      - description: Controller register set
23      - description: Slave DMA data port register set
24
25  reg-names:
26    items:
27      - const: reg
28      - const: sdma
29
30  interrupts:
31    maxItems: 1
32
33  clocks:
34    maxItems: 1
35
36  clock-names:
37    items:
38      - const: nf_clk
39
40  dmas:
41    maxItems: 1
42
43  iommus:
44    maxItems: 1
45
46  cdns,board-delay-ps:
47    description: |
48      Estimated Board delay. The value includes the total round trip
49      delay for the signals and is used for deciding on values associated
50      with data read capture. The example formula for SDR mode is the
51      following.
52      board delay = RE#PAD delay + PCB trace to device + PCB trace from device
53      + DQ PAD delay
54
55required:
56  - compatible
57  - reg
58  - reg-names
59  - interrupts
60  - clocks
61  - clock-names
62
63unevaluatedProperties: false
64
65examples:
66  - |
67    #include <dt-bindings/interrupt-controller/arm-gic.h>
68
69    nand-controller@10b80000 {
70        compatible = "cdns,hp-nfc";
71        reg = <0x10b80000 0x10000>,
72              <0x10840000 0x10000>;
73        reg-names = "reg", "sdma";
74        #address-cells = <1>;
75        #size-cells = <0>;
76        interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
77        clocks = <&clk>;
78        clock-names = "nf_clk";
79        cdns,board-delay-ps = <4830>;
80
81        nand@0 {
82            reg = <0>;
83        };
84    };
85