xref: /linux/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml (revision be1ca3ee8f97067fee87fda73ea5959d5ab75bbf) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/cdns,hp-nfc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Cadence NAND controller
8
9maintainers:
10  - Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
11
12allOf:
13  - $ref: nand-controller.yaml
14
15properties:
16  compatible:
17    items:
18      - const: cdns,hp-nfc
19
20  reg:
21    items:
22      - description: Controller register set
23      - description: Slave DMA data port register set
24
25  reg-names:
26    items:
27      - const: reg
28      - const: sdma
29
30  interrupts:
31    maxItems: 1
32
33  clocks:
34    maxItems: 1
35
36  clock-names:
37    items:
38      - const: nf_clk
39
40  dmas:
41    maxItems: 1
42
43  dma-coherent: true
44
45  iommus:
46    maxItems: 1
47
48  cdns,board-delay-ps:
49    description: |
50      Estimated Board delay. The value includes the total round trip
51      delay for the signals and is used for deciding on values associated
52      with data read capture. The example formula for SDR mode is the
53      following.
54      board delay = RE#PAD delay + PCB trace to device + PCB trace from device
55      + DQ PAD delay
56
57required:
58  - compatible
59  - reg
60  - reg-names
61  - interrupts
62  - clocks
63  - clock-names
64
65unevaluatedProperties: false
66
67examples:
68  - |
69    #include <dt-bindings/interrupt-controller/arm-gic.h>
70
71    nand-controller@10b80000 {
72        compatible = "cdns,hp-nfc";
73        reg = <0x10b80000 0x10000>,
74              <0x10840000 0x10000>;
75        reg-names = "reg", "sdma";
76        #address-cells = <1>;
77        #size-cells = <0>;
78        interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
79        clocks = <&clk>;
80        clock-names = "nf_clk";
81        cdns,board-delay-ps = <4830>;
82
83        nand@0 {
84            reg = <0>;
85        };
86    };
87