1Atmel NAND flash 2 3Required properties: 4- compatible : "atmel,at91rm9200-nand". 5- reg : should specify localbus address and size used for the chip, 6 and hardware ECC controller if available. 7 If the hardware ECC is PMECC, it should contain address and size for 8 PMECC, PMECC Error Location controller and ROM which has lookup tables. 9- atmel,nand-addr-offset : offset for the address latch. 10- atmel,nand-cmd-offset : offset for the command latch. 11- #address-cells, #size-cells : Must be present if the device has sub-nodes 12 representing partitions. 13 14- gpios : specifies the gpio pins to control the NAND device. detect is an 15 optional gpio and may be set to 0 if not present. 16 17Optional properties: 18- nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default. 19 Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first", 20 "soft_bch". 21- atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware. 22 Only supported by at91sam9x5 or later sam9 product. 23- atmel,pmecc-cap : error correct capability for Programmable Multibit ECC 24 Controller. Supported values are: 2, 4, 8, 12, 24. 25- atmel,pmecc-sector-size : sector size for ECC computation. Supported values 26 are: 512, 1024. 27- atmel,pmecc-lookup-table-offset : includes two offsets of lookup table in ROM 28 for different sector size. First one is for sector size 512, the next is for 29 sector size 1024. 30- nand-bus-width : 8 or 16 bus width if not present 8 31- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false 32 33Examples: 34nand0: nand@40000000,0 { 35 compatible = "atmel,at91rm9200-nand"; 36 #address-cells = <1>; 37 #size-cells = <1>; 38 reg = <0x40000000 0x10000000 39 0xffffe800 0x200 40 >; 41 atmel,nand-addr-offset = <21>; /* ale */ 42 atmel,nand-cmd-offset = <22>; /* cle */ 43 nand-on-flash-bbt; 44 nand-ecc-mode = "soft"; 45 gpios = <&pioC 13 0 /* rdy */ 46 &pioC 14 0 /* nce */ 47 0 /* cd */ 48 >; 49 partition@0 { 50 ... 51 }; 52}; 53 54/* for PMECC supported chips */ 55nand0: nand@40000000 { 56 compatible = "atmel,at91rm9200-nand"; 57 #address-cells = <1>; 58 #size-cells = <1>; 59 reg = < 0x40000000 0x10000000 /* bus addr & size */ 60 0xffffe000 0x00000600 /* PMECC addr & size */ 61 0xffffe600 0x00000200 /* PMECC ERRLOC addr & size */ 62 0x00100000 0x00100000 /* ROM addr & size */ 63 >; 64 atmel,nand-addr-offset = <21>; /* ale */ 65 atmel,nand-cmd-offset = <22>; /* cle */ 66 nand-on-flash-bbt; 67 nand-ecc-mode = "hw"; 68 atmel,has-pmecc; /* enable PMECC */ 69 atmel,pmecc-cap = <2>; 70 atmel,pmecc-sector-size = <512>; 71 atmel,pmecc-lookup-table-offset = <0x8000 0x10000>; 72 gpios = <&pioD 5 0 /* rdy */ 73 &pioD 4 0 /* nce */ 74 0 /* cd */ 75 >; 76 partition@0 { 77 ... 78 }; 79}; 80