xref: /linux/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml (revision 0526b56cbc3c489642bd6a5fe4b718dea7ef0ee8) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/allwinner,sun4i-a10-nand.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 NAND Controller
8
9allOf:
10  - $ref: nand-controller.yaml
11
12maintainers:
13  - Chen-Yu Tsai <wens@csie.org>
14  - Maxime Ripard <mripard@kernel.org>
15
16properties:
17  compatible:
18    enum:
19      - allwinner,sun4i-a10-nand
20      - allwinner,sun8i-a23-nand-controller
21  reg:
22    maxItems: 1
23
24  interrupts:
25    maxItems: 1
26
27  clocks:
28    items:
29      - description: Bus Clock
30      - description: Module Clock
31
32  clock-names:
33    items:
34      - const: ahb
35      - const: mod
36
37  resets:
38    maxItems: 1
39
40  reset-names:
41    const: ahb
42
43  dmas:
44    maxItems: 1
45
46  dma-names:
47    const: rxtx
48
49patternProperties:
50  "^nand@[a-f0-9]$":
51    type: object
52    properties:
53      reg:
54        minimum: 0
55        maximum: 7
56
57      nand-ecc-mode: true
58
59      nand-ecc-algo:
60        const: bch
61
62      nand-ecc-step-size:
63        enum: [ 512, 1024 ]
64
65      nand-ecc-strength:
66        maximum: 80
67
68      allwinner,rb:
69        description:
70          Contains the native Ready/Busy IDs.
71        $ref: /schemas/types.yaml#/definitions/uint32-array
72        minItems: 1
73        maxItems: 2
74        items:
75          minimum: 0
76          maximum: 1
77
78    additionalProperties: false
79
80required:
81  - compatible
82  - reg
83  - interrupts
84  - clocks
85  - clock-names
86
87unevaluatedProperties: false
88
89examples:
90  - |
91    #include <dt-bindings/interrupt-controller/arm-gic.h>
92    #include <dt-bindings/clock/sun6i-rtc.h>
93    #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
94    #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
95
96    nand-controller@1c03000 {
97        compatible = "allwinner,sun8i-a23-nand-controller";
98        reg = <0x01c03000 0x1000>;
99        interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
100        clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
101        clock-names = "ahb", "mod";
102        resets = <&ccu RST_BUS_NAND>;
103        reset-names = "ahb";
104        dmas = <&dma 5>;
105        dma-names = "rxtx";
106        pinctrl-names = "default";
107        pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
108        #address-cells = <1>;
109        #size-cells = <0>;
110    };
111
112...
113