xref: /linux/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml (revision 55a42f78ffd386e01a5404419f8c5ded7db70a21) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Marvell PXA SDHCI v1/v2/v3
8
9maintainers:
10  - Ulf Hansson <ulf.hansson@linaro.org>
11
12allOf:
13  - $ref: mmc-controller.yaml#
14  - if:
15      properties:
16        compatible:
17          contains:
18            const: marvell,armada-380-sdhci
19    then:
20      properties:
21        reg:
22          minItems: 3
23        reg-names:
24          minItems: 3
25      required:
26        - reg-names
27    else:
28      properties:
29        reg:
30          maxItems: 1
31        reg-names:
32          maxItems: 1
33  - if:
34      properties:
35        compatible:
36          contains:
37            const: mrvl,pxav1-mmc
38    then:
39      properties:
40        pinctrl-names:
41          description:
42            Optional for supporting PXA168 SDIO IRQ errata to switch CMD pin between
43            SDIO CMD and GPIO mode.
44          items:
45            - const: default
46            - const: state_cmd_gpio
47          minItems: 1
48
49        pinctrl-1:
50          description:
51            Should switch CMD pin to GPIO mode as a high output.
52  - if:
53      properties:
54        compatible:
55          contains:
56            const: mrvl,pxav3-mmc
57    then:
58      properties:
59        pinctrl-names:
60          description:
61            Optional for increasing stability of the controller at fast bus clocks.
62          items:
63            - const: default
64            - const: state_uhs
65          minItems: 1
66
67        pinctrl-1:
68          description:
69            Should switch the drive strength of the data pins to high.
70
71properties:
72  compatible:
73    enum:
74      - mrvl,pxav1-mmc
75      - mrvl,pxav2-mmc
76      - mrvl,pxav3-mmc
77      - marvell,armada-380-sdhci
78
79  reg:
80    minItems: 1
81    maxItems: 3
82
83  reg-names:
84    items:
85      - const: sdhci
86      - const: mbus
87      - const: conf-sdio3
88
89  interrupts:
90    maxItems: 1
91
92  clocks:
93    minItems: 1
94    maxItems: 2
95
96  clock-names:
97    minItems: 1
98    items:
99      - const: io
100      - const: core
101
102  pinctrl-names: true
103
104  pinctrl-0:
105    description:
106      Should contain default pinctrl.
107
108  pinctrl-1: true
109
110  mrvl,clk-delay-cycles:
111    description: Specify a number of cycles to delay for tuning.
112    $ref: /schemas/types.yaml#/definitions/uint32
113
114required:
115  - compatible
116  - reg
117  - interrupts
118  - clocks
119  - clock-names
120
121unevaluatedProperties: false
122
123examples:
124  - |
125    #include <dt-bindings/clock/berlin2.h>
126    mmc@d4280800 {
127        compatible = "mrvl,pxav3-mmc";
128        reg = <0xd4280800 0x800>;
129        bus-width = <8>;
130        interrupts = <27>;
131        clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>;
132        clock-names = "io", "core";
133        non-removable;
134        mrvl,clk-delay-cycles = <31>;
135    };
136  - |
137    mmc@d8000 {
138        compatible = "marvell,armada-380-sdhci";
139        reg-names = "sdhci", "mbus", "conf-sdio3";
140        reg = <0xd8000 0x1000>,
141              <0xdc000 0x100>,
142              <0x18454 0x4>;
143        interrupts = <0 25 0x4>;
144        clocks = <&gateclk 17>;
145        clock-names = "io";
146        mrvl,clk-delay-cycles = <0x1F>;
147    };
148
149...
150