xref: /linux/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml (revision 407da561244b9d51e6a794d6305ba38ec2c9d907) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip designware mobile storage host controller
8
9description:
10  Rockchip uses the Synopsys designware mobile storage host controller
11  to interface a SoC with storage medium such as eMMC or SD/MMC cards.
12  This file documents the combined properties for the core Synopsys dw mshc
13  controller that are not already included in the synopsys-dw-mshc-common.yaml
14  file and the Rockchip specific extensions.
15
16allOf:
17  - $ref: "synopsys-dw-mshc-common.yaml#"
18
19maintainers:
20  - Heiko Stuebner <heiko@sntech.de>
21
22# Everything else is described in the common file
23properties:
24  compatible:
25    oneOf:
26      # for Rockchip RK2928 and before RK3288
27      - const: rockchip,rk2928-dw-mshc
28      # for Rockchip RK3288
29      - const: rockchip,rk3288-dw-mshc
30      - items:
31          - enum:
32              - rockchip,px30-dw-mshc
33              - rockchip,rk1808-dw-mshc
34              - rockchip,rk3036-dw-mshc
35              - rockchip,rk3128-dw-mshc
36              - rockchip,rk3228-dw-mshc
37              - rockchip,rk3308-dw-mshc
38              - rockchip,rk3328-dw-mshc
39              - rockchip,rk3368-dw-mshc
40              - rockchip,rk3399-dw-mshc
41              - rockchip,rk3568-dw-mshc
42              - rockchip,rv1108-dw-mshc
43              - rockchip,rv1126-dw-mshc
44          - const: rockchip,rk3288-dw-mshc
45
46  reg:
47    maxItems: 1
48
49  interrupts:
50    maxItems: 1
51
52  clocks:
53    minItems: 2
54    maxItems: 4
55    description:
56      Handle to "biu" and "ciu" clocks for the bus interface unit clock and
57      the card interface unit clock. If "ciu-drive" and "ciu-sample" are
58      specified in clock-names, it should also contain
59      handles to these clocks.
60
61  clock-names:
62    minItems: 2
63    items:
64      - const: biu
65      - const: ciu
66      - const: ciu-drive
67      - const: ciu-sample
68    description:
69      Apart from the clock-names "biu" and "ciu" two more clocks
70      "ciu-drive" and "ciu-sample" are supported. They are used
71      to control the clock phases, "ciu-sample" is required for tuning
72      high speed modes.
73
74  power-domains:
75    maxItems: 1
76
77  rockchip,default-sample-phase:
78    $ref: /schemas/types.yaml#/definitions/uint32
79    minimum: 0
80    maximum: 360
81    default: 0
82    description:
83      The default phase to set "ciu-sample" at probing,
84      low speeds or in case where all phases work at tuning time.
85      If not specified 0 deg will be used.
86
87  rockchip,desired-num-phases:
88    $ref: /schemas/types.yaml#/definitions/uint32
89    minimum: 0
90    maximum: 360
91    default: 360
92    description:
93      The desired number of times that the host execute tuning when needed.
94      If not specified, the host will do tuning for 360 times,
95      namely tuning for each degree.
96
97required:
98  - compatible
99  - reg
100  - interrupts
101  - clocks
102  - clock-names
103
104unevaluatedProperties: false
105
106examples:
107  - |
108    #include <dt-bindings/clock/rk3288-cru.h>
109    #include <dt-bindings/interrupt-controller/arm-gic.h>
110    #include <dt-bindings/interrupt-controller/irq.h>
111    sdmmc: mmc@ff0c0000 {
112      compatible = "rockchip,rk3288-dw-mshc";
113      reg = <0xff0c0000 0x4000>;
114      interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
115      clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
116               <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
117      clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
118      resets = <&cru SRST_MMC0>;
119      reset-names = "reset";
120      fifo-depth = <0x100>;
121      max-frequency = <150000000>;
122    };
123
124...
125