1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mmc/renesas,sdhi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas SDHI SD/MMC controller 8 9maintainers: 10 - Wolfram Sang <wsa+renesas@sang-engineering.com> 11 12properties: 13 compatible: 14 oneOf: 15 - enum: 16 - renesas,sdhi-mmc-r8a77470 # RZ/G1C 17 - renesas,sdhi-r7s72100 # RZ/A1H 18 - renesas,sdhi-r7s9210 # SH-Mobile AG5 19 - renesas,sdhi-r8a73a4 # R-Mobile APE6 20 - renesas,sdhi-r8a7740 # R-Mobile A1 21 - renesas,sdhi-sh73a0 # R-Mobile APE6 22 - items: 23 - enum: 24 - renesas,sdhi-r8a7778 # R-Car M1 25 - renesas,sdhi-r8a7779 # R-Car H1 26 - const: renesas,rcar-gen1-sdhi # R-Car Gen1 27 - items: 28 - enum: 29 - renesas,sdhi-r8a7742 # RZ/G1H 30 - renesas,sdhi-r8a7743 # RZ/G1M 31 - renesas,sdhi-r8a7744 # RZ/G1N 32 - renesas,sdhi-r8a7745 # RZ/G1E 33 - renesas,sdhi-r8a77470 # RZ/G1C 34 - renesas,sdhi-r8a7790 # R-Car H2 35 - renesas,sdhi-r8a7791 # R-Car M2-W 36 - renesas,sdhi-r8a7792 # R-Car V2H 37 - renesas,sdhi-r8a7793 # R-Car M2-N 38 - renesas,sdhi-r8a7794 # R-Car E2 39 - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1 40 - items: 41 - enum: 42 - renesas,sdhi-r8a774a1 # RZ/G2M 43 - renesas,sdhi-r8a774b1 # RZ/G2N 44 - renesas,sdhi-r8a774c0 # RZ/G2E 45 - renesas,sdhi-r8a774e1 # RZ/G2H 46 - renesas,sdhi-r8a7795 # R-Car H3 47 - renesas,sdhi-r8a7796 # R-Car M3-W 48 - renesas,sdhi-r8a77961 # R-Car M3-W+ 49 - renesas,sdhi-r8a77965 # R-Car M3-N 50 - renesas,sdhi-r8a77970 # R-Car V3M 51 - renesas,sdhi-r8a77980 # R-Car V3H 52 - renesas,sdhi-r8a77990 # R-Car E3 53 - renesas,sdhi-r8a77995 # R-Car D3 54 - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2 55 - items: 56 - enum: 57 - renesas,sdhi-r8a779a0 # R-Car V3U 58 - renesas,sdhi-r8a779f0 # R-Car S4-8 59 - renesas,sdhi-r8a779g0 # R-Car V4H 60 - renesas,sdhi-r8a779h0 # R-Car V4M 61 - const: renesas,rcar-gen4-sdhi # R-Car Gen4 62 - items: 63 - enum: 64 - renesas,sdhi-r9a07g043 # RZ/G2UL and RZ/Five 65 - renesas,sdhi-r9a07g044 # RZ/G2{L,LC} 66 - renesas,sdhi-r9a07g054 # RZ/V2L 67 - renesas,sdhi-r9a08g045 # RZ/G3S 68 - renesas,sdhi-r9a09g011 # RZ/V2M 69 - const: renesas,rzg2l-sdhi 70 71 reg: 72 maxItems: 1 73 74 interrupts: 75 minItems: 1 76 maxItems: 3 77 78 clocks: true 79 80 clock-names: true 81 82 dmas: 83 minItems: 4 84 maxItems: 4 85 86 dma-names: 87 minItems: 4 88 maxItems: 4 89 items: 90 enum: 91 - tx 92 - rx 93 94 iommus: 95 maxItems: 1 96 97 power-domains: 98 maxItems: 1 99 100 resets: 101 maxItems: 1 102 103 pinctrl-0: 104 minItems: 1 105 maxItems: 2 106 107 pinctrl-1: 108 maxItems: 1 109 110 pinctrl-names: true 111 112 max-frequency: true 113 114allOf: 115 - $ref: mmc-controller.yaml 116 117 - if: 118 properties: 119 compatible: 120 contains: 121 const: renesas,rzg2l-sdhi 122 then: 123 properties: 124 clocks: 125 items: 126 - description: IMCLK, SDHI channel main clock1. 127 - description: CLK_HS, SDHI channel High speed clock which operates 128 4 times that of SDHI channel main clock1. 129 - description: IMCLK2, SDHI channel main clock2. When this clock is 130 turned off, external SD card detection cannot be 131 detected. 132 - description: ACLK, SDHI channel bus clock. 133 clock-names: 134 items: 135 - const: core 136 - const: clkh 137 - const: cd 138 - const: aclk 139 required: 140 - clock-names 141 - resets 142 else: 143 if: 144 properties: 145 compatible: 146 contains: 147 enum: 148 - renesas,rcar-gen2-sdhi 149 - renesas,rcar-gen3-sdhi 150 - renesas,rcar-gen4-sdhi 151 then: 152 properties: 153 clocks: 154 minItems: 1 155 maxItems: 3 156 clock-names: 157 minItems: 1 158 uniqueItems: true 159 items: 160 - const: core 161 - enum: [ clkh, cd ] 162 - const: cd 163 else: 164 properties: 165 clocks: 166 minItems: 1 167 maxItems: 2 168 clock-names: 169 minItems: 1 170 items: 171 - const: core 172 - const: cd 173 174 - if: 175 properties: 176 compatible: 177 contains: 178 const: renesas,sdhi-mmc-r8a77470 179 then: 180 properties: 181 pinctrl-names: 182 items: 183 - const: state_uhs 184 else: 185 properties: 186 pinctrl-names: 187 minItems: 1 188 items: 189 - const: default 190 - const: state_uhs 191 192 - if: 193 properties: 194 compatible: 195 contains: 196 enum: 197 - renesas,sdhi-r7s72100 198 - renesas,sdhi-r7s9210 199 then: 200 required: 201 - clock-names 202 description: 203 The internal card detection logic that exists in these controllers is 204 sectioned off to be run by a separate second clock source to allow 205 the main core clock to be turned off to save power. 206 207required: 208 - compatible 209 - reg 210 - interrupts 211 - clocks 212 - power-domains 213 214unevaluatedProperties: false 215 216examples: 217 - | 218 #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 219 #include <dt-bindings/interrupt-controller/arm-gic.h> 220 #include <dt-bindings/power/r8a7790-sysc.h> 221 222 sdhi0: mmc@ee100000 { 223 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 224 reg = <0xee100000 0x328>; 225 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 226 clocks = <&cpg CPG_MOD 314>; 227 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>; 228 dma-names = "tx", "rx", "tx", "rx"; 229 max-frequency = <195000000>; 230 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 231 resets = <&cpg 314>; 232 }; 233 234 sdhi1: mmc@ee120000 { 235 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 236 reg = <0xee120000 0x328>; 237 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 238 clocks = <&cpg CPG_MOD 313>; 239 dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>; 240 dma-names = "tx", "rx", "tx", "rx"; 241 max-frequency = <195000000>; 242 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 243 resets = <&cpg 313>; 244 }; 245 246 sdhi2: mmc@ee140000 { 247 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 248 reg = <0xee140000 0x100>; 249 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 250 clocks = <&cpg CPG_MOD 312>; 251 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>; 252 dma-names = "tx", "rx", "tx", "rx"; 253 max-frequency = <97500000>; 254 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 255 resets = <&cpg 312>; 256 }; 257 258 sdhi3: mmc@ee160000 { 259 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 260 reg = <0xee160000 0x100>; 261 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 262 clocks = <&cpg CPG_MOD 311>; 263 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>; 264 dma-names = "tx", "rx", "tx", "rx"; 265 max-frequency = <97500000>; 266 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 267 resets = <&cpg 311>; 268 }; 269