1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mmc/renesas,sdhi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas SDHI SD/MMC controller 8 9maintainers: 10 - Wolfram Sang <wsa+renesas@sang-engineering.com> 11 12properties: 13 compatible: 14 oneOf: 15 - enum: 16 - renesas,sdhi-mmc-r8a77470 # RZ/G1C 17 - renesas,sdhi-r7s72100 # RZ/A1H 18 - renesas,sdhi-r7s9210 # SH-Mobile AG5 19 - renesas,sdhi-r8a73a4 # R-Mobile APE6 20 - renesas,sdhi-r8a7740 # R-Mobile A1 21 - renesas,sdhi-r9a09g057 # RZ/V2H(P) 22 - renesas,sdhi-sh73a0 # R-Mobile APE6 23 - items: 24 - enum: 25 - renesas,sdhi-r8a7778 # R-Car M1 26 - renesas,sdhi-r8a7779 # R-Car H1 27 - const: renesas,rcar-gen1-sdhi # R-Car Gen1 28 - items: 29 - enum: 30 - renesas,sdhi-r8a7742 # RZ/G1H 31 - renesas,sdhi-r8a7743 # RZ/G1M 32 - renesas,sdhi-r8a7744 # RZ/G1N 33 - renesas,sdhi-r8a7745 # RZ/G1E 34 - renesas,sdhi-r8a77470 # RZ/G1C 35 - renesas,sdhi-r8a7790 # R-Car H2 36 - renesas,sdhi-r8a7791 # R-Car M2-W 37 - renesas,sdhi-r8a7792 # R-Car V2H 38 - renesas,sdhi-r8a7793 # R-Car M2-N 39 - renesas,sdhi-r8a7794 # R-Car E2 40 - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1 41 - items: 42 - enum: 43 - renesas,sdhi-r8a774a1 # RZ/G2M 44 - renesas,sdhi-r8a774b1 # RZ/G2N 45 - renesas,sdhi-r8a774c0 # RZ/G2E 46 - renesas,sdhi-r8a774e1 # RZ/G2H 47 - renesas,sdhi-r8a7795 # R-Car H3 48 - renesas,sdhi-r8a7796 # R-Car M3-W 49 - renesas,sdhi-r8a77961 # R-Car M3-W+ 50 - renesas,sdhi-r8a77965 # R-Car M3-N 51 - renesas,sdhi-r8a77970 # R-Car V3M 52 - renesas,sdhi-r8a77980 # R-Car V3H 53 - renesas,sdhi-r8a77990 # R-Car E3 54 - renesas,sdhi-r8a77995 # R-Car D3 55 - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2 56 - items: 57 - enum: 58 - renesas,sdhi-r8a779a0 # R-Car V3U 59 - renesas,sdhi-r8a779f0 # R-Car S4-8 60 - renesas,sdhi-r8a779g0 # R-Car V4H 61 - renesas,sdhi-r8a779h0 # R-Car V4M 62 - const: renesas,rcar-gen4-sdhi # R-Car Gen4 63 - items: 64 - enum: 65 - renesas,sdhi-r9a07g043 # RZ/G2UL and RZ/Five 66 - renesas,sdhi-r9a07g044 # RZ/G2{L,LC} 67 - renesas,sdhi-r9a07g054 # RZ/V2L 68 - renesas,sdhi-r9a08g045 # RZ/G3S 69 - renesas,sdhi-r9a09g011 # RZ/V2M 70 - const: renesas,rzg2l-sdhi 71 - items: 72 - enum: 73 - renesas,sdhi-r9a09g047 # RZ/G3E 74 - renesas,sdhi-r9a09g056 # RZ/V2N 75 - renesas,sdhi-r9a09g077 # RZ/T2H 76 - renesas,sdhi-r9a09g087 # RZ/N2H 77 - const: renesas,sdhi-r9a09g057 # RZ/V2H(P) 78 79 reg: 80 maxItems: 1 81 82 interrupts: 83 minItems: 1 84 maxItems: 3 85 86 clocks: 87 minItems: 1 88 maxItems: 4 89 90 clock-names: 91 minItems: 1 92 maxItems: 4 93 94 dmas: 95 minItems: 4 96 maxItems: 4 97 98 dma-names: 99 minItems: 4 100 maxItems: 4 101 items: 102 enum: 103 - tx 104 - rx 105 106 iommus: 107 maxItems: 1 108 109 power-domains: 110 maxItems: 1 111 112 resets: 113 maxItems: 1 114 115 pinctrl-0: 116 minItems: 1 117 maxItems: 2 118 119 pinctrl-1: 120 maxItems: 1 121 122 pinctrl-names: true 123 124 max-frequency: true 125 126allOf: 127 - $ref: mmc-controller.yaml 128 129 - if: 130 properties: 131 compatible: 132 contains: 133 enum: 134 - renesas,sdhi-r9a09g077 135 - renesas,sdhi-r9a09g087 136 then: 137 properties: 138 resets: false 139 clocks: 140 items: 141 - description: ACLK, IMCLK, SDHI channel bus and main clocks. 142 - description: CLK_HS, SDHI channel High speed clock. 143 clock-names: 144 items: 145 - const: aclk 146 - const: clkh 147 else: 148 if: 149 properties: 150 compatible: 151 contains: 152 enum: 153 - renesas,sdhi-r9a09g057 154 - renesas,rzg2l-sdhi 155 then: 156 properties: 157 clocks: 158 items: 159 - description: IMCLK, SDHI channel main clock1. 160 - description: CLK_HS, SDHI channel High speed clock which operates 161 4 times that of SDHI channel main clock1. 162 - description: IMCLK2, SDHI channel main clock2. When this clock is 163 turned off, external SD card detection cannot be 164 detected. 165 - description: ACLK, SDHI channel bus clock. 166 clock-names: 167 items: 168 - const: core 169 - const: clkh 170 - const: cd 171 - const: aclk 172 required: 173 - clock-names 174 - resets 175 else: 176 if: 177 properties: 178 compatible: 179 contains: 180 enum: 181 - renesas,rcar-gen2-sdhi 182 - renesas,rcar-gen3-sdhi 183 - renesas,rcar-gen4-sdhi 184 then: 185 properties: 186 clocks: 187 minItems: 1 188 maxItems: 3 189 clock-names: 190 minItems: 1 191 uniqueItems: true 192 items: 193 - const: core 194 - enum: [ clkh, cd ] 195 - const: cd 196 else: 197 properties: 198 clocks: 199 minItems: 1 200 maxItems: 2 201 clock-names: 202 minItems: 1 203 items: 204 - const: core 205 - const: cd 206 207 - if: 208 properties: 209 compatible: 210 contains: 211 const: renesas,sdhi-mmc-r8a77470 212 then: 213 properties: 214 pinctrl-names: 215 items: 216 - const: state_uhs 217 else: 218 properties: 219 pinctrl-names: 220 minItems: 1 221 items: 222 - const: default 223 - const: state_uhs 224 225 - if: 226 properties: 227 compatible: 228 contains: 229 enum: 230 - renesas,sdhi-r7s72100 231 - renesas,sdhi-r7s9210 232 then: 233 required: 234 - clock-names 235 description: 236 The internal card detection logic that exists in these controllers is 237 sectioned off to be run by a separate second clock source to allow 238 the main core clock to be turned off to save power. 239 240 - if: 241 properties: 242 compatible: 243 contains: 244 const: renesas,sdhi-r9a09g057 245 then: 246 properties: 247 vqmmc-regulator: 248 type: object 249 description: VQMMC SD regulator 250 $ref: /schemas/regulator/regulator.yaml# 251 unevaluatedProperties: false 252 253required: 254 - compatible 255 - reg 256 - interrupts 257 - clocks 258 - power-domains 259 260unevaluatedProperties: false 261 262examples: 263 - | 264 #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 265 #include <dt-bindings/interrupt-controller/arm-gic.h> 266 #include <dt-bindings/power/r8a7790-sysc.h> 267 268 sdhi0: mmc@ee100000 { 269 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 270 reg = <0xee100000 0x328>; 271 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 272 clocks = <&cpg CPG_MOD 314>; 273 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>; 274 dma-names = "tx", "rx", "tx", "rx"; 275 max-frequency = <195000000>; 276 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 277 resets = <&cpg 314>; 278 }; 279 280 sdhi1: mmc@ee120000 { 281 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 282 reg = <0xee120000 0x328>; 283 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 284 clocks = <&cpg CPG_MOD 313>; 285 dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>; 286 dma-names = "tx", "rx", "tx", "rx"; 287 max-frequency = <195000000>; 288 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 289 resets = <&cpg 313>; 290 }; 291 292 sdhi2: mmc@ee140000 { 293 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 294 reg = <0xee140000 0x100>; 295 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 296 clocks = <&cpg CPG_MOD 312>; 297 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>; 298 dma-names = "tx", "rx", "tx", "rx"; 299 max-frequency = <97500000>; 300 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 301 resets = <&cpg 312>; 302 }; 303 304 sdhi3: mmc@ee160000 { 305 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 306 reg = <0xee160000 0x100>; 307 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 308 clocks = <&cpg CPG_MOD 311>; 309 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>; 310 dma-names = "tx", "rx", "tx", "rx"; 311 max-frequency = <97500000>; 312 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 313 resets = <&cpg 311>; 314 }; 315