1These properties are common to multiple MMC host controllers. Any host 2that requires the respective functionality should implement them using 3these definitions. 4 5Interpreted by the OF core: 6- reg: Registers location and length. 7- interrupts: Interrupts used by the MMC controller. 8 9Card detection: 10If no property below is supplied, host native card detect is used. 11Only one of the properties in this section should be supplied: 12 - broken-cd: There is no card detection available; polling must be used. 13 - cd-gpios: Specify GPIOs for card detection, see gpio binding 14 - non-removable: non-removable slot (like eMMC); assume always present. 15 16Optional properties: 17- bus-width: Number of data lines, can be <1>, <4>, or <8>. The default 18 will be <1> if the property is absent. 19- wp-gpios: Specify GPIOs for write protection, see gpio binding 20- cd-inverted: when present, polarity on the CD line is inverted. See the note 21 below for the case, when a GPIO is used for the CD line 22- wp-inverted: when present, polarity on the WP line is inverted. See the note 23 below for the case, when a GPIO is used for the WP line 24- max-frequency: maximum operating clock frequency 25- no-1-8-v: when present, denotes that 1.8v card voltage is not supported on 26 this system, even if the controller claims it is. 27- cap-sd-highspeed: SD high-speed timing is supported 28- cap-mmc-highspeed: MMC high-speed timing is supported 29- sd-uhs-sdr12: SD UHS SDR12 speed is supported 30- sd-uhs-sdr25: SD UHS SDR25 speed is supported 31- sd-uhs-sdr50: SD UHS SDR50 speed is supported 32- sd-uhs-sdr104: SD UHS SDR104 speed is supported 33- sd-uhs-ddr50: SD UHS DDR50 speed is supported 34- cap-power-off-card: powering off the card is safe 35- cap-sdio-irq: enable SDIO IRQ signalling on this interface 36- full-pwr-cycle: full power cycle of the card is supported 37- mmc-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported 38- mmc-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported 39- mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported 40- mmc-hs200-1_2v: eMMC HS200 mode(1.2V I/O) is supported 41- mmc-hs400-1_8v: eMMC HS400 mode(1.8V I/O) is supported 42- mmc-hs400-1_2v: eMMC HS400 mode(1.2V I/O) is supported 43 44*NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line 45polarity properties, we have to fix the meaning of the "normal" and "inverted" 46line levels. We choose to follow the SDHCI standard, which specifies both those 47lines as "active low." Therefore, using the "cd-inverted" property means, that 48the CD line is active high, i.e. it is high, when a card is inserted. Similar 49logic applies to the "wp-inverted" property. 50 51CD and WP lines can be implemented on the hardware in one of two ways: as GPIOs, 52specified in cd-gpios and wp-gpios properties, or as dedicated pins. Polarity of 53dedicated pins can be specified, using *-inverted properties. GPIO polarity can 54also be specified using the OF_GPIO_ACTIVE_LOW flag. This creates an ambiguity 55in the latter case. We choose to use the XOR logic for GPIO CD and WP lines. 56This means, the two properties are "superimposed," for example leaving the 57OF_GPIO_ACTIVE_LOW flag clear and specifying the respective *-inverted 58property results in a double-inversion and actually means the "normal" line 59polarity is in effect. 60 61Optional SDIO properties: 62- keep-power-in-suspend: Preserves card power during a suspend/resume cycle 63- enable-sdio-wakeup: Enables wake up of host system on SDIO IRQ assertion 64 65Example: 66 67sdhci@ab000000 { 68 compatible = "sdhci"; 69 reg = <0xab000000 0x200>; 70 interrupts = <23>; 71 bus-width = <4>; 72 cd-gpios = <&gpio 69 0>; 73 cd-inverted; 74 wp-gpios = <&gpio 70 0>; 75 max-frequency = <50000000>; 76 keep-power-in-suspend; 77 enable-sdio-wakeup; 78} 79