xref: /linux/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml (revision 0526b56cbc3c489642bd6a5fe4b718dea7ef0ee8) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/ingenic,mmc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Ingenic SoCs MMC Controller
8
9maintainers:
10  - Paul Cercueil <paul@crapouillou.net>
11
12allOf:
13  - $ref: mmc-controller.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - enum:
19          - ingenic,jz4740-mmc
20          - ingenic,jz4725b-mmc
21          - ingenic,jz4760-mmc
22          - ingenic,jz4775-mmc
23          - ingenic,jz4780-mmc
24          - ingenic,x1000-mmc
25      - items:
26          - const: ingenic,jz4770-mmc
27          - const: ingenic,jz4760-mmc
28
29  reg:
30    maxItems: 1
31
32  interrupts:
33    maxItems: 1
34
35  clocks:
36    maxItems: 1
37
38  clock-names:
39    const: mmc
40
41  dmas:
42    minItems: 1
43    maxItems: 2
44
45  dma-names:
46    oneOf:
47      - items:
48          - const: rx
49          - const: tx
50      - const: tx-rx
51
52required:
53  - compatible
54  - reg
55  - interrupts
56  - clocks
57  - clock-names
58  - dmas
59  - dma-names
60
61unevaluatedProperties: false
62
63examples:
64  - |
65    #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
66    #include <dt-bindings/dma/jz4780-dma.h>
67    mmc0: mmc@13450000 {
68      compatible = "ingenic,jz4780-mmc";
69      reg = <0x13450000 0x1000>;
70
71      interrupt-parent = <&intc>;
72      interrupts = <37>;
73
74      clocks = <&cgu JZ4780_CLK_MSC0>;
75      clock-names = "mmc";
76
77      cap-sd-highspeed;
78      cap-mmc-highspeed;
79      cap-sdio-irq;
80      dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
81             <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
82      dma-names = "rx", "tx";
83    };
84  - |
85    #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
86    #include <dt-bindings/dma/jz4780-dma.h>
87    /*
88     * Alternative version of the example above,
89     * but using one single DMA channel for both
90     * TX and RX.
91     */
92    mmc1: mmc@13460000 {
93      compatible = "ingenic,jz4780-mmc";
94      reg = <0x13460000 0x1000>;
95
96      interrupt-parent = <&intc>;
97      interrupts = <36>;
98
99      clocks = <&cgu JZ4780_CLK_MSC1>;
100      clock-names = "mmc";
101
102      cap-sd-highspeed;
103      cap-mmc-highspeed;
104      cap-sdio-irq;
105      dmas = <&dma JZ4780_DMA_MSC1_TX JZ4780_DMA_MSC1_RX 0xffffffff>;
106      dma-names = "tx-rx";
107    };
108