1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX 8 9maintainers: 10 - Shawn Guo <shawnguo@kernel.org> 11 12allOf: 13 - $ref: sdhci-common.yaml# 14 15description: | 16 The Enhanced Secure Digital Host Controller on Freescale i.MX family 17 provides an interface for MMC, SD, and SDIO types of memory cards. 18 19 This file documents differences between the core properties described 20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver. 21 22properties: 23 compatible: 24 oneOf: 25 - enum: 26 - fsl,imx25-esdhc 27 - fsl,imx35-esdhc 28 - fsl,imx51-esdhc 29 - fsl,imx53-esdhc 30 - fsl,imx6q-usdhc 31 - fsl,imx6sl-usdhc 32 - fsl,imx6sx-usdhc 33 - fsl,imx7d-usdhc 34 - fsl,imx7ulp-usdhc 35 - fsl,imx8mm-usdhc 36 - fsl,imxrt1050-usdhc 37 - nxp,s32g2-usdhc 38 - nxp,s32n79-usdhc 39 - items: 40 - const: fsl,imx50-esdhc 41 - const: fsl,imx53-esdhc 42 - items: 43 - enum: 44 - fsl,imx6sll-usdhc 45 - fsl,imx6ull-usdhc 46 - fsl,imx6ul-usdhc 47 - const: fsl,imx6sx-usdhc 48 - items: 49 - const: fsl,imx7d-usdhc 50 - const: fsl,imx6sl-usdhc 51 - items: 52 - enum: 53 - fsl,imx8mq-usdhc 54 - const: fsl,imx7d-usdhc 55 - items: 56 - enum: 57 - fsl,imx8mn-usdhc 58 - fsl,imx8mp-usdhc 59 - fsl,imx8ulp-usdhc 60 - fsl,imx93-usdhc 61 - fsl,imx94-usdhc 62 - fsl,imx95-usdhc 63 - const: fsl,imx8mm-usdhc 64 - items: 65 - enum: 66 - fsl,imx8dxl-usdhc 67 - fsl,imx8qm-usdhc 68 - const: fsl,imx8qxp-usdhc 69 - items: 70 - enum: 71 - fsl,imx8mm-usdhc 72 - fsl,imx8mn-usdhc 73 - fsl,imx8mp-usdhc 74 - fsl,imx8qm-usdhc 75 - fsl,imx8qxp-usdhc 76 - const: fsl,imx7d-usdhc 77 deprecated: true 78 - items: 79 - enum: 80 - fsl,imx8mn-usdhc 81 - fsl,imx8mp-usdhc 82 - const: fsl,imx8mm-usdhc 83 - const: fsl,imx7d-usdhc 84 deprecated: true 85 - items: 86 - enum: 87 - fsl,imx8dxl-usdhc 88 - fsl,imx8qm-usdhc 89 - const: fsl,imx8qxp-usdhc 90 - const: fsl,imx7d-usdhc 91 deprecated: true 92 - items: 93 - enum: 94 - fsl,imxrt1170-usdhc 95 - const: fsl,imxrt1050-usdhc 96 - items: 97 - const: nxp,s32g3-usdhc 98 - const: nxp,s32g2-usdhc 99 100 reg: 101 maxItems: 1 102 103 interrupts: 104 maxItems: 1 105 106 fsl,wp-controller: 107 description: | 108 boolean, if present, indicate to use controller internal write protection. 109 type: boolean 110 111 fsl,delay-line: 112 $ref: /schemas/types.yaml#/definitions/uint32 113 description: | 114 Specify the number of delay cells for override mode. 115 This is used to set the clock delay for DLL(Delay Line) on override mode 116 to select a proper data sampling window in case the clock quality is not good 117 because the signal path is too long on the board. Please refer to eSDHC/uSDHC 118 chapter, DLL (Delay Line) section in RM for details. 119 default: 0 120 121 voltage-ranges: 122 $ref: /schemas/types.yaml#/definitions/uint32-matrix 123 description: | 124 Specify the voltage range in case there are software transparent level 125 shifters on the outputs of the controller. Two cells are required, first 126 cell specifies minimum slot voltage (mV), second cell specifies maximum 127 slot voltage (mV). 128 items: 129 items: 130 - description: value for minimum slot voltage 131 - description: value for maximum slot voltage 132 maxItems: 1 133 134 fsl,tuning-start-tap: 135 $ref: /schemas/types.yaml#/definitions/uint32 136 description: | 137 Specify the start delay cell point when send first CMD19 in tuning procedure. 138 default: 0 139 140 fsl,tuning-step: 141 $ref: /schemas/types.yaml#/definitions/uint32 142 description: | 143 Specify the increasing delay cell steps in tuning procedure. 144 The uSDHC use one delay cell as default increasing step to do tuning process. 145 This property allows user to change the tuning step to more than one delay 146 cell which is useful for some special boards or cards when the default 147 tuning step can't find the proper delay window within limited tuning retries. 148 default: 0 149 150 fsl,strobe-dll-delay-target: 151 $ref: /schemas/types.yaml#/definitions/uint32 152 description: | 153 Specify the strobe dll control slave delay target. 154 This delay target programming host controller loopback read clock, and this 155 property allows user to change the delay target for the strobe input read clock. 156 If not use this property, driver default set the delay target to value 7. 157 Only eMMC HS400 mode need to take care of this property. 158 default: 0 159 160 clocks: 161 maxItems: 3 162 description: 163 Handle clocks for the sdhc controller. 164 165 clock-names: 166 items: 167 - const: ipg 168 - const: ahb 169 - const: per 170 171 iommus: 172 maxItems: 1 173 174 power-domains: 175 maxItems: 1 176 177 pinctrl-names: 178 oneOf: 179 - minItems: 3 180 items: 181 - const: default 182 - const: state_100mhz 183 - const: state_200mhz 184 - const: sleep 185 - minItems: 2 186 items: 187 - const: default 188 - const: state_100mhz 189 - const: sleep 190 - minItems: 1 191 items: 192 - const: default 193 - const: sleep 194 195required: 196 - compatible 197 - reg 198 - interrupts 199 200unevaluatedProperties: false 201 202examples: 203 - | 204 mmc@70004000 { 205 compatible = "fsl,imx51-esdhc"; 206 reg = <0x70004000 0x4000>; 207 interrupts = <1>; 208 fsl,wp-controller; 209 }; 210 211 mmc@70008000 { 212 compatible = "fsl,imx51-esdhc"; 213 reg = <0x70008000 0x4000>; 214 interrupts = <2>; 215 cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */ 216 wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */ 217 }; 218