xref: /linux/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml (revision 0ad53fe3ae82443c74ff8cfd7bd13377cc1134a3) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
8
9maintainers:
10  - Shawn Guo <shawnguo@kernel.org>
11
12allOf:
13  - $ref: "mmc-controller.yaml"
14
15description: |
16  The Enhanced Secure Digital Host Controller on Freescale i.MX family
17  provides an interface for MMC, SD, and SDIO types of memory cards.
18
19  This file documents differences between the core properties described
20  by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
21
22properties:
23  compatible:
24    oneOf:
25      - enum:
26          - fsl,imx25-esdhc
27          - fsl,imx35-esdhc
28          - fsl,imx51-esdhc
29          - fsl,imx53-esdhc
30          - fsl,imx6q-usdhc
31          - fsl,imx6sl-usdhc
32          - fsl,imx6sll-usdhc
33          - fsl,imx6sx-usdhc
34          - fsl,imx6ull-usdhc
35          - fsl,imx7d-usdhc
36          - fsl,imx7ulp-usdhc
37      - items:
38          - enum:
39              - fsl,imx8mm-usdhc
40              - fsl,imx8mn-usdhc
41              - fsl,imx8mp-usdhc
42              - fsl,imx8mq-usdhc
43              - fsl,imx8qm-usdhc
44              - fsl,imx8qxp-usdhc
45          - const: fsl,imx7d-usdhc
46
47  reg:
48    maxItems: 1
49
50  interrupts:
51    maxItems: 1
52
53  fsl,wp-controller:
54    description: |
55      boolean, if present, indicate to use controller internal write protection.
56    type: boolean
57
58  fsl,delay-line:
59    $ref: /schemas/types.yaml#/definitions/uint32
60    description: |
61      Specify the number of delay cells for override mode.
62      This is used to set the clock delay for DLL(Delay Line) on override mode
63      to select a proper data sampling window in case the clock quality is not good
64      due to signal path is too long on the board. Please refer to eSDHC/uSDHC
65      chapter, DLL (Delay Line) section in RM for details.
66    default: 0
67
68  voltage-ranges:
69    $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
70    description: |
71      Specify the voltage range in case there are software transparent level
72      shifters on the outputs of the controller. Two cells are required, first
73      cell specifies minimum slot voltage (mV), second cell specifies maximum
74      slot voltage (mV).
75    items:
76      items:
77        - description: value for minimum slot voltage
78        - description: value for maximum slot voltage
79    maxItems: 1
80
81  fsl,tuning-start-tap:
82    $ref: /schemas/types.yaml#/definitions/uint32
83    description: |
84      Specify the start delay cell point when send first CMD19 in tuning procedure.
85    default: 0
86
87  fsl,tuning-step:
88    $ref: /schemas/types.yaml#/definitions/uint32
89    description: |
90      Specify the increasing delay cell steps in tuning procedure.
91      The uSDHC use one delay cell as default increasing step to do tuning process.
92      This property allows user to change the tuning step to more than one delay
93      cells which is useful for some special boards or cards when the default
94      tuning step can't find the proper delay window within limited tuning retries.
95    default: 0
96
97  fsl,strobe-dll-delay-target:
98    $ref: /schemas/types.yaml#/definitions/uint32
99    description: |
100      Specify the strobe dll control slave delay target.
101      This delay target programming host controller loopback read clock, and this
102      property allows user to change the delay target for the strobe input read clock.
103      If not use this property, driver default set the delay target to value 7.
104      Only eMMC HS400 mode need to take care of this property.
105    default: 0
106
107  clocks:
108    maxItems: 3
109    description:
110      Handle clocks for the sdhc controller.
111
112  clock-names:
113    items:
114      - const: ipg
115      - const: ahb
116      - const: per
117
118  pinctrl-names:
119    oneOf:
120      - minItems: 3
121        items:
122          - const: default
123          - const: state_100mhz
124          - const: state_200mhz
125          - const: sleep
126      - minItems: 1
127        items:
128          - const: default
129          - const: sleep
130
131required:
132  - compatible
133  - reg
134  - interrupts
135
136unevaluatedProperties: false
137
138examples:
139  - |
140    mmc@70004000 {
141        compatible = "fsl,imx51-esdhc";
142        reg = <0x70004000 0x4000>;
143        interrupts = <1>;
144        fsl,wp-controller;
145    };
146
147    mmc@70008000 {
148        compatible = "fsl,imx51-esdhc";
149        reg = <0x70008000 0x4000>;
150        interrupts = <2>;
151        cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
152        wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
153    };
154