xref: /linux/Documentation/devicetree/bindings/mmc/bst,c1200-sdhci.yaml (revision fc2d791a43d3880496d1c729b8bd74d2c19cb4e7) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/bst,c1200-sdhci.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Black Sesame Technologies DWCMSHC SDHCI Controller
8
9maintainers:
10  - Ge Gordon <gordon.ge@bst.ai>
11
12allOf:
13  - $ref: sdhci-common.yaml#
14
15properties:
16  compatible:
17    const: bst,c1200-sdhci
18
19  reg:
20    items:
21      - description: Core SDHCI registers
22      - description: CRM registers
23
24  interrupts:
25    maxItems: 1
26
27  clocks:
28    maxItems: 1
29
30  clock-names:
31    items:
32      - const: core
33
34  memory-region:
35    maxItems: 1
36
37  dma-coherent: true
38
39required:
40  - compatible
41  - reg
42  - interrupts
43  - clocks
44  - clock-names
45
46unevaluatedProperties: false
47
48examples:
49  - |
50    #include <dt-bindings/interrupt-controller/arm-gic.h>
51    #include <dt-bindings/interrupt-controller/irq.h>
52
53    bus {
54        #address-cells = <2>;
55        #size-cells = <2>;
56
57        mmc@22200000 {
58            compatible = "bst,c1200-sdhci";
59            reg = <0x0 0x22200000 0x0 0x1000>,
60                  <0x0 0x23006000 0x0 0x1000>;
61            interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
62            clocks = <&clk_mmc>;
63            clock-names = "core";
64            memory-region = <&mmc0_reserved>;
65            max-frequency = <200000000>;
66            bus-width = <8>;
67            non-removable;
68            dma-coherent;
69        };
70    };
71