1# SPDX-License-Identifier: GPL-2.0-or-later 2# Copyright 2019 IBM Corp. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: ASPEED SD/SDIO/MMC Controller 9 10maintainers: 11 - Andrew Jeffery <andrew@aj.id.au> 12 - Ryan Chen <ryanchen.aspeed@gmail.com> 13 14description: |+ 15 The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO 16 Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if 17 only a single slot is enabled. 18 19 The two slots are supported by a common configuration area. As the SDHCIs for 20 the slots are dependent on the common configuration area, they are described 21 as child nodes. 22 23properties: 24 compatible: 25 enum: 26 - aspeed,ast2400-sd-controller 27 - aspeed,ast2500-sd-controller 28 - aspeed,ast2600-sd-controller 29 reg: 30 maxItems: 1 31 description: Common configuration registers 32 "#address-cells": 33 const: 1 34 "#size-cells": 35 const: 1 36 ranges: true 37 clocks: 38 maxItems: 1 39 description: The SD/SDIO controller clock gate 40 41patternProperties: 42 "^sdhci@[0-9a-f]+$": 43 type: object 44 $ref: mmc-controller.yaml 45 unevaluatedProperties: false 46 47 properties: 48 compatible: 49 enum: 50 - aspeed,ast2400-sdhci 51 - aspeed,ast2500-sdhci 52 - aspeed,ast2600-sdhci 53 reg: 54 maxItems: 1 55 description: The SDHCI registers 56 clocks: 57 maxItems: 1 58 description: The SD bus clock 59 interrupts: 60 maxItems: 1 61 description: The SD interrupt shared between both slots 62 sdhci,auto-cmd12: 63 type: boolean 64 description: Specifies that controller should use auto CMD12 65 required: 66 - compatible 67 - reg 68 - clocks 69 - interrupts 70 71additionalProperties: false 72 73required: 74 - compatible 75 - reg 76 - "#address-cells" 77 - "#size-cells" 78 - ranges 79 - clocks 80 81examples: 82 - | 83 #include <dt-bindings/clock/aspeed-clock.h> 84 sdc@1e740000 { 85 compatible = "aspeed,ast2500-sd-controller"; 86 reg = <0x1e740000 0x100>; 87 #address-cells = <1>; 88 #size-cells = <1>; 89 ranges = <0 0x1e740000 0x20000>; 90 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 91 92 sdhci0: sdhci@100 { 93 compatible = "aspeed,ast2500-sdhci"; 94 reg = <0x100 0x100>; 95 interrupts = <26>; 96 sdhci,auto-cmd12; 97 clocks = <&syscon ASPEED_CLK_SDIO>; 98 }; 99 100 sdhci1: sdhci@200 { 101 compatible = "aspeed,ast2500-sdhci"; 102 reg = <0x200 0x100>; 103 interrupts = <26>; 104 sdhci,auto-cmd12; 105 clocks = <&syscon ASPEED_CLK_SDIO>; 106 }; 107 }; 108