xref: /linux/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdio.txt (revision 664b0bae0b87f69bc9deb098f5e0158b9cf18e04)
1*17f5e716SCarlo Caione* Amlogic Meson6, Meson8 and Meson8b SDIO/MMC controller
2*17f5e716SCarlo Caione
3*17f5e716SCarlo CaioneThe highspeed MMC host controller on Amlogic SoCs provides an interface
4*17f5e716SCarlo Caionefor MMC, SD, SDIO and SDHC types of memory cards.
5*17f5e716SCarlo Caione
6*17f5e716SCarlo CaioneSupported maximum speeds are the ones of the eMMC standard 4.41 as well
7*17f5e716SCarlo Caioneas the speed of SD standard 2.0.
8*17f5e716SCarlo Caione
9*17f5e716SCarlo CaioneThe hardware provides an internal "mux" which allows up to three slots
10*17f5e716SCarlo Caioneto be controlled. Only one slot can be accessed at a time.
11*17f5e716SCarlo Caione
12*17f5e716SCarlo CaioneRequired properties:
13*17f5e716SCarlo Caione - compatible : must be one of
14*17f5e716SCarlo Caione	- "amlogic,meson8-sdio"
15*17f5e716SCarlo Caione	- "amlogic,meson8b-sdio"
16*17f5e716SCarlo Caione	along with the generic "amlogic,meson-mx-sdio"
17*17f5e716SCarlo Caione - reg : mmc controller base registers
18*17f5e716SCarlo Caione - interrupts : mmc controller interrupt
19*17f5e716SCarlo Caione - #address-cells : must be 1
20*17f5e716SCarlo Caione - size-cells : must be 0
21*17f5e716SCarlo Caione - clocks : phandle to clock providers
22*17f5e716SCarlo Caione - clock-names : must contain "core" and "clkin"
23*17f5e716SCarlo Caione
24*17f5e716SCarlo CaioneRequired child nodes:
25*17f5e716SCarlo CaioneA node for each slot provided by the MMC controller is required.
26*17f5e716SCarlo CaioneNOTE: due to a driver limitation currently only one slot (= child node)
27*17f5e716SCarlo Caione      is supported!
28*17f5e716SCarlo Caione
29*17f5e716SCarlo CaioneRequired properties on each child node (= slot):
30*17f5e716SCarlo Caione - compatible : must be "mmc-slot" (see mmc.txt within this directory)
31*17f5e716SCarlo Caione - reg : the slot (or "port") ID
32*17f5e716SCarlo Caione
33*17f5e716SCarlo CaioneOptional properties on each child node (= slot):
34*17f5e716SCarlo Caione - bus-width : must be 1 or 4 (8-bit bus is not supported)
35*17f5e716SCarlo Caione - for cd and all other additional generic mmc parameters
36*17f5e716SCarlo Caione   please refer to mmc.txt within this directory
37*17f5e716SCarlo Caione
38*17f5e716SCarlo CaioneExamples:
39*17f5e716SCarlo Caione	mmc@c1108c20 {
40*17f5e716SCarlo Caione		compatible = "amlogic,meson8-sdio", "amlogic,meson-mx-sdio";
41*17f5e716SCarlo Caione		reg = <0xc1108c20 0x20>;
42*17f5e716SCarlo Caione		interrupts = <0 28 1>;
43*17f5e716SCarlo Caione		#address-cells = <1>;
44*17f5e716SCarlo Caione		#size-cells = <0>;
45*17f5e716SCarlo Caione		clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>;
46*17f5e716SCarlo Caione		clock-names = "core", "clkin";
47*17f5e716SCarlo Caione
48*17f5e716SCarlo Caione		slot@1 {
49*17f5e716SCarlo Caione			compatible = "mmc-slot";
50*17f5e716SCarlo Caione			reg = <1>;
51*17f5e716SCarlo Caione
52*17f5e716SCarlo Caione			bus-width = <4>;
53*17f5e716SCarlo Caione		};
54*17f5e716SCarlo Caione	};
55