xref: /linux/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml (revision d4d8fbcef03f590288b44955d8d51e334627b013)
1*d4d8fbceSDragan Cvetic# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*d4d8fbceSDragan Cvetic%YAML 1.2
3*d4d8fbceSDragan Cvetic---
4*d4d8fbceSDragan Cvetic$id: http://devicetree.org/schemas/misc/xlnx,sd-fec.yaml#
5*d4d8fbceSDragan Cvetic$schema: http://devicetree.org/meta-schemas/core.yaml#
6*d4d8fbceSDragan Cvetic
7*d4d8fbceSDragan Cvetictitle: Xilinx SDFEC(16nm) IP
8*d4d8fbceSDragan Cvetic
9*d4d8fbceSDragan Cveticmaintainers:
10*d4d8fbceSDragan Cvetic  - Cvetic, Dragan <dragan.cvetic@amd.com>
11*d4d8fbceSDragan Cvetic  - Erim, Salih <salih.erim@amd.com>
12*d4d8fbceSDragan Cvetic
13*d4d8fbceSDragan Cveticdescription:
14*d4d8fbceSDragan Cvetic  The Soft Decision Forward Error Correction (SDFEC) Engine is a Hard IP block
15*d4d8fbceSDragan Cvetic  which provides high-throughput LDPC and Turbo Code implementations.
16*d4d8fbceSDragan Cvetic  The LDPC decode & encode functionality is capable of covering a range of
17*d4d8fbceSDragan Cvetic  customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality
18*d4d8fbceSDragan Cvetic  principally covers codes used by LTE. The FEC Engine offers significant
19*d4d8fbceSDragan Cvetic  power and area savings versus implementations done in the FPGA fabric.
20*d4d8fbceSDragan Cvetic
21*d4d8fbceSDragan Cveticproperties:
22*d4d8fbceSDragan Cvetic  compatible:
23*d4d8fbceSDragan Cvetic    const: xlnx,sd-fec-1.1
24*d4d8fbceSDragan Cvetic
25*d4d8fbceSDragan Cvetic  reg:
26*d4d8fbceSDragan Cvetic    maxItems: 1
27*d4d8fbceSDragan Cvetic
28*d4d8fbceSDragan Cvetic  clocks:
29*d4d8fbceSDragan Cvetic    minItems: 2
30*d4d8fbceSDragan Cvetic    maxItems: 8
31*d4d8fbceSDragan Cvetic    additionalItems: true
32*d4d8fbceSDragan Cvetic    items:
33*d4d8fbceSDragan Cvetic      - description: Main processing clock for processing core
34*d4d8fbceSDragan Cvetic      - description: AXI4-Lite memory-mapped slave interface clock
35*d4d8fbceSDragan Cvetic      - description: Control input AXI4-Stream Slave interface clock
36*d4d8fbceSDragan Cvetic      - description: DIN AXI4-Stream Slave interface clock
37*d4d8fbceSDragan Cvetic      - description: Status output AXI4-Stream Master interface clock
38*d4d8fbceSDragan Cvetic      - description: DOUT AXI4-Stream Master interface clock
39*d4d8fbceSDragan Cvetic      - description: DIN_WORDS AXI4-Stream Slave interface clock
40*d4d8fbceSDragan Cvetic      - description: DOUT_WORDS AXI4-Stream Master interface clock
41*d4d8fbceSDragan Cvetic
42*d4d8fbceSDragan Cvetic  clock-names:
43*d4d8fbceSDragan Cvetic    allOf:
44*d4d8fbceSDragan Cvetic      - minItems: 2
45*d4d8fbceSDragan Cvetic        maxItems: 8
46*d4d8fbceSDragan Cvetic        additionalItems: true
47*d4d8fbceSDragan Cvetic        items:
48*d4d8fbceSDragan Cvetic          - const: core_clk
49*d4d8fbceSDragan Cvetic          - const: s_axi_aclk
50*d4d8fbceSDragan Cvetic      - items:
51*d4d8fbceSDragan Cvetic          enum:
52*d4d8fbceSDragan Cvetic            - core_clk
53*d4d8fbceSDragan Cvetic            - s_axi_aclk
54*d4d8fbceSDragan Cvetic            - s_axis_ctrl_aclk
55*d4d8fbceSDragan Cvetic            - s_axis_din_aclk
56*d4d8fbceSDragan Cvetic            - m_axis_status_aclk
57*d4d8fbceSDragan Cvetic            - m_axis_dout_aclk
58*d4d8fbceSDragan Cvetic            - s_axis_din_words_aclk
59*d4d8fbceSDragan Cvetic            - m_axis_dout_words_aclk
60*d4d8fbceSDragan Cvetic
61*d4d8fbceSDragan Cvetic  interrupts:
62*d4d8fbceSDragan Cvetic    maxItems: 1
63*d4d8fbceSDragan Cvetic
64*d4d8fbceSDragan Cvetic  xlnx,sdfec-code:
65*d4d8fbceSDragan Cvetic    description:
66*d4d8fbceSDragan Cvetic      The SD-FEC integrated block supports Low Density Parity Check (LDPC)
67*d4d8fbceSDragan Cvetic      decoding and encoding and Turbo code decoding. The LDPC codes used are
68*d4d8fbceSDragan Cvetic      highly configurable, and the specific code used can be specified on
69*d4d8fbceSDragan Cvetic      a codeword-by-codeword basis. The Turbo code decoding is required by LTE
70*d4d8fbceSDragan Cvetic      standard.
71*d4d8fbceSDragan Cvetic    $ref: /schemas/types.yaml#/definitions/string
72*d4d8fbceSDragan Cvetic    items:
73*d4d8fbceSDragan Cvetic      enum: [ ldpc, turbo ]
74*d4d8fbceSDragan Cvetic
75*d4d8fbceSDragan Cvetic  xlnx,sdfec-din-width:
76*d4d8fbceSDragan Cvetic    description:
77*d4d8fbceSDragan Cvetic      Configures the DIN AXI stream where a value of 1
78*d4d8fbceSDragan Cvetic      configures a width of "1x128b", 2 a width of "2x128b" and 4 configures a width
79*d4d8fbceSDragan Cvetic      of "4x128b".
80*d4d8fbceSDragan Cvetic    $ref: /schemas/types.yaml#/definitions/uint32
81*d4d8fbceSDragan Cvetic    enum: [ 1, 2, 4 ]
82*d4d8fbceSDragan Cvetic
83*d4d8fbceSDragan Cvetic  xlnx,sdfec-din-words:
84*d4d8fbceSDragan Cvetic    description:
85*d4d8fbceSDragan Cvetic      A value 0 indicates that the DIN_WORDS interface is
86*d4d8fbceSDragan Cvetic      driven with a fixed value and is not present on the device, a value of 1
87*d4d8fbceSDragan Cvetic      configures the DIN_WORDS to be block based, while a value of 2 configures the
88*d4d8fbceSDragan Cvetic      DIN_WORDS input to be supplied for each AXI transaction.
89*d4d8fbceSDragan Cvetic    $ref: /schemas/types.yaml#/definitions/uint32
90*d4d8fbceSDragan Cvetic    enum: [ 0, 1, 2 ]
91*d4d8fbceSDragan Cvetic
92*d4d8fbceSDragan Cvetic  xlnx,sdfec-dout-width:
93*d4d8fbceSDragan Cvetic    description:
94*d4d8fbceSDragan Cvetic      Configures the DOUT AXI stream where a value of 1 configures a width of "1x128b",
95*d4d8fbceSDragan Cvetic      2 a width of "2x128b" and 4 configures a width of "4x128b".
96*d4d8fbceSDragan Cvetic    $ref: /schemas/types.yaml#/definitions/uint32
97*d4d8fbceSDragan Cvetic    enum: [ 1, 2, 4 ]
98*d4d8fbceSDragan Cvetic
99*d4d8fbceSDragan Cvetic  xlnx,sdfec-dout-words:
100*d4d8fbceSDragan Cvetic    description:
101*d4d8fbceSDragan Cvetic      A value 0 indicates that the DOUT_WORDS interface is
102*d4d8fbceSDragan Cvetic      driven with a fixed value and is not present on the device, a value of 1
103*d4d8fbceSDragan Cvetic      configures the DOUT_WORDS to be block based, while a value of 2 configures the
104*d4d8fbceSDragan Cvetic      DOUT_WORDS input to be supplied for each AXI transaction.
105*d4d8fbceSDragan Cvetic    $ref: /schemas/types.yaml#/definitions/uint32
106*d4d8fbceSDragan Cvetic    enum: [ 0, 1, 2 ]
107*d4d8fbceSDragan Cvetic
108*d4d8fbceSDragan Cveticrequired:
109*d4d8fbceSDragan Cvetic  - compatible
110*d4d8fbceSDragan Cvetic  - reg
111*d4d8fbceSDragan Cvetic  - clocks
112*d4d8fbceSDragan Cvetic  - clock-names
113*d4d8fbceSDragan Cvetic  - xlnx,sdfec-code
114*d4d8fbceSDragan Cvetic  - xlnx,sdfec-din-width
115*d4d8fbceSDragan Cvetic  - xlnx,sdfec-din-words
116*d4d8fbceSDragan Cvetic  - xlnx,sdfec-dout-width
117*d4d8fbceSDragan Cvetic  - xlnx,sdfec-dout-words
118*d4d8fbceSDragan Cvetic
119*d4d8fbceSDragan CveticadditionalProperties: false
120*d4d8fbceSDragan Cvetic
121*d4d8fbceSDragan Cveticexamples:
122*d4d8fbceSDragan Cvetic  - |
123*d4d8fbceSDragan Cvetic    #include <dt-bindings/interrupt-controller/irq.h>
124*d4d8fbceSDragan Cvetic
125*d4d8fbceSDragan Cvetic    sd-fec@a0040000 {
126*d4d8fbceSDragan Cvetic        compatible = "xlnx,sd-fec-1.1";
127*d4d8fbceSDragan Cvetic        reg = <0xa0040000 0x40000>;
128*d4d8fbceSDragan Cvetic        clocks = <&misc_clk_2>, <&misc_clk_0>, <&misc_clk_1>, <&misc_clk_1>,
129*d4d8fbceSDragan Cvetic                 <&misc_clk_1>, <&misc_clk_1>;
130*d4d8fbceSDragan Cvetic        clock-names = "core_clk", "s_axi_aclk", "s_axis_ctrl_aclk",
131*d4d8fbceSDragan Cvetic                      "s_axis_din_aclk", "m_axis_status_aclk",
132*d4d8fbceSDragan Cvetic                      "m_axis_dout_aclk";
133*d4d8fbceSDragan Cvetic        interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
134*d4d8fbceSDragan Cvetic        xlnx,sdfec-code = "ldpc";
135*d4d8fbceSDragan Cvetic        xlnx,sdfec-din-width = <2>;
136*d4d8fbceSDragan Cvetic        xlnx,sdfec-din-words = <0>;
137*d4d8fbceSDragan Cvetic        xlnx,sdfec-dout-width = <1>;
138*d4d8fbceSDragan Cvetic        xlnx,sdfec-dout-words = <0>;
139*d4d8fbceSDragan Cvetic    };
140*d4d8fbceSDragan Cvetic
141