1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/misc/qcom,fastrpc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm FastRPC Driver 8 9maintainers: 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 11 12description: | 13 The FastRPC implements an IPC (Inter-Processor Communication) 14 mechanism that allows for clients to transparently make remote method 15 invocations across DSP and APPS boundaries. This enables developers 16 to offload tasks to the DSP and free up the application processor for 17 other tasks. 18 19properties: 20 compatible: 21 enum: 22 - qcom,kaanapali-fastrpc 23 - qcom,fastrpc 24 25 label: 26 enum: 27 - adsp 28 - mdsp 29 - sdsp 30 - cdsp 31 - cdsp1 32 - gdsp0 33 - gdsp1 34 35 memory-region: 36 maxItems: 1 37 description: 38 Phandle to a node describing memory to be used for remote heap CMA. 39 40 qcom,glink-channels: 41 description: 42 A list of channels tied to this function, used for matching 43 the function to a set of virtual channels. 44 $ref: /schemas/types.yaml#/definitions/string-array 45 items: 46 - const: fastrpcglink-apps-dsp 47 48 qcom,non-secure-domain: 49 description: 50 Used to mark the current domain as non-secure. 51 type: boolean 52 53 qcom,smd-channels: 54 description: 55 Channel name used for the RPM communication 56 $ref: /schemas/types.yaml#/definitions/string-array 57 items: 58 - const: fastrpcsmd-apps-dsp 59 60 qcom,vmids: 61 description: 62 Virtual machine IDs for remote processor. 63 $ref: /schemas/types.yaml#/definitions/uint32-array 64 65 "#address-cells": 66 const: 1 67 68 "#size-cells": 69 const: 0 70 71patternProperties: 72 "(compute-)?cb@[0-9]*$": 73 type: object 74 75 description: > 76 Each subnode of the Fastrpc represents compute context banks available on the dsp. 77 78 properties: 79 compatible: 80 const: qcom,fastrpc-compute-cb 81 82 reg: 83 maxItems: 1 84 85 dma-coherent: true 86 87 iommus: 88 minItems: 1 89 maxItems: 10 90 91 qcom,nsessions: 92 $ref: /schemas/types.yaml#/definitions/uint32 93 default: 1 94 description: > 95 A value indicating how many sessions can share this context bank. 96 97 required: 98 - compatible 99 - reg 100 101 additionalProperties: false 102 103required: 104 - compatible 105 - label 106 - "#address-cells" 107 - "#size-cells" 108 109additionalProperties: false 110 111examples: 112 - | 113 #include <dt-bindings/interrupt-controller/arm-gic.h> 114 #include <dt-bindings/mailbox/qcom-ipcc.h> 115 116 glink-edge { 117 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 118 IPCC_MPROC_SIGNAL_GLINK_QMP 119 IRQ_TYPE_EDGE_RISING>; 120 mboxes = <&ipcc IPCC_CLIENT_LPASS 121 IPCC_MPROC_SIGNAL_GLINK_QMP>; 122 label = "lpass"; 123 qcom,remote-pid = <2>; 124 125 fastrpc { 126 compatible = "qcom,fastrpc"; 127 qcom,glink-channels = "fastrpcglink-apps-dsp"; 128 label = "sdsp"; 129 qcom,non-secure-domain; 130 #address-cells = <1>; 131 #size-cells = <0>; 132 133 compute-cb@1 { 134 compatible = "qcom,fastrpc-compute-cb"; 135 reg = <1>; 136 iommus = <&apps_smmu 0x0541 0x0>; 137 }; 138 139 compute-cb@2 { 140 compatible = "qcom,fastrpc-compute-cb"; 141 reg = <2>; 142 iommus = <&apps_smmu 0x0542 0x0>; 143 }; 144 145 compute-cb@3 { 146 compatible = "qcom,fastrpc-compute-cb"; 147 reg = <3>; 148 iommus = <&apps_smmu 0x0543 0x0>; 149 }; 150 }; 151 }; 152