xref: /linux/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.yaml (revision e7e86d7697c6ed1dbbde18d7185c35b6967945ed)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/misc/nvidia,tegra186-misc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra186 (and later) MISC register block
8
9maintainers:
10  - Thierry Reding <thierry.reding@gmail.com>
11  - Jon Hunter <jonathanh@nvidia.com>
12
13description: The MISC register block found on Tegra186 and later SoCs contains
14  registers that can be used to identify a given chip and various strapping
15  options.
16
17properties:
18  compatible:
19    enum:
20      - nvidia,tegra186-misc
21      - nvidia,tegra194-misc
22      - nvidia,tegra234-misc
23      - nvidia,tegra264-misc
24
25  reg:
26    items:
27      - description: physical address and length of the registers which
28          contain revision and debug features
29      - description: physical address and length of the registers which
30          indicate strapping options
31
32additionalProperties: false
33
34required:
35  - compatible
36  - reg
37
38examples:
39  - |
40    misc@100000 {
41        compatible = "nvidia,tegra186-misc";
42        reg = <0x00100000 0xf000>,
43              <0x0010f000 0x1000>;
44    };
45