xref: /linux/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-manager.yaml (revision a1c3be890440a1769ed6f822376a3e3ab0d42994) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright 2019 Linaro Ltd.
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/misc/intel,ixp4xx-ahb-queue-manager.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Intel IXP4xx AHB Queue Manager
9
10maintainers:
11  - Linus Walleij <linus.walleij@linaro.org>
12
13description: |
14  The IXP4xx AHB Queue Manager maintains queues as circular buffers in
15  an 8KB embedded SRAM along with hardware pointers. It is used by both
16  the XScale processor and the NPEs (Network Processing Units) in the
17  IXP4xx for accelerating queues, especially for networking. Clients pick
18  queues from the queue manager with foo-queue = <&qmgr N> where the
19  &qmgr is a phandle to the queue manager and N is the queue resource
20  number. The queue resources available and their specific purpose
21  on a certain IXP4xx system will vary.
22
23properties:
24  compatible:
25    items:
26      - const: intel,ixp4xx-ahb-queue-manager
27
28  reg:
29    maxItems: 1
30
31  interrupts:
32    items:
33      - description: Interrupt for queues 0-31
34      - description: Interrupt for queues 32-63
35
36required:
37  - compatible
38  - reg
39  - interrupts
40
41additionalProperties: false
42
43examples:
44  - |
45    #include <dt-bindings/interrupt-controller/irq.h>
46
47    qmgr: queue-manager@60000000 {
48         compatible = "intel,ixp4xx-ahb-queue-manager";
49         reg = <0x60000000 0x4000>;
50         interrupts = <3 IRQ_TYPE_LEVEL_HIGH>, <4 IRQ_TYPE_LEVEL_HIGH>;
51    };
52